74AHC373D

The 74AHC373D belongs to 74AHC/AHCT373 which are octal D-type transparent latches featuring separate D-type inputs for each latch and 3-state outputs for bus oriented applications. A Latch Enable (LE) input and an Output Enable (OE) input are common to all latches. The '373'consists of eight D-type transparent latches with 3-state true outputs. When LE is HIGH, data at the Dn inputs enters the latches. In this condition the latches are transparent, i.e. a latch output will change state each time its corresponding D-input changes. When LE is LOW the latches store the information that was present at the D-inputs a set-up time preceding the HIGH-to-LOW transition of LE. When OE is LOW, the contents of the 8 latches are available at the outputs. When OE is HIGH, the outputs go to the high-impedance OFF-state. Operation of the OE input does not affect the state of the latches. The '373' is functionally identical to the '533' , '563'and'573', but the '533'and '563' have inverted outputs and the'563'and '573' have a different pin arrangement. The 74AHC/AHCT373 are high-speed Si-gate CMOS devices and are pin compatible with Low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The features of 74AHC373D can be summarized as (1)ESD protection: HBM EIA/JESD22-A114-A exceeds 2000 V/MM EIA/JESD22-A115-A exceeds 200 V/CDM EIA/JESD22-C101 exceeds 1000 V; (2)balanced propagation delays; (3)all inputs have schmitt-trigger actions; (4)inputs accepts voltages higher than VCC; (5)common 3-state output enable input; (6)functionally identical to the '533', '563' and '573'; (7)for AHC only: operates with CMOS input levels; (8)for AHCT only: operates with TTL input levels; (9)specified from -40 to +85 °C and -40 to +125 °C.

The absolute maximum ratings of 74AHC373D are (1)VCC DC supply voltage: -0.5 to +7.0 V; (2)VI input voltage: -0.5 to +7.0V; (3)IIK DC input diode current (VI < -0.5 V; note ):-20 mA; (4)IOK DC output diode current(VO < -0.5 V or VO > VCC + 0.5 V; note 1): ±20mA; (5)IO DC output source or sink current(-0.5 V < VO < VCC + 0.5 V): ±25mA; (6)ICC DC VCC or GND current: ±75mA; (7)Tstg storage temperature: -65 to +150°C; (8)PD power dissipation per package(for temperature range: -40 to +125 °C; note 2): 500mW.