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Part Number: 74AHCT594
Description: The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schot...


Description: The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schot...
The 74AHC594; 74AHCT594 is a high-speed Si-gate CMOS device and is pin compatible with Low-Power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7A.
The 74AHC594; 74AHCT594 is an 8-bit, non-inverting, serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Separate clocks (SHCP and STCP) and direct overriding clears (SHR and STR) are provided on both the shift and storage registers. A serial output (Q7S) is provided for cascading purposes.
Both the shift and storage register clocks are positive-edge triggered. If the user wishes to connect both clocks together, the shift register will always be one count pulse ahead of the storage register.
| Symbol | Parameter | Conditions |
Min |
Max |
Unit |
| VCC | supply voltage |
-0.5 |
+7.0 |
V | |
| VI | input voltage |
-0.5 |
+7.0 |
V | |
| IIK | input clamping current | VI < -0.5 V |
-20 |
mA | |
| IOK | output clamping current | VO < -0.5 V or VO > VCC + 0.5 V |
±20 |
mA | |
| IO | output current | VO = -0.5 V to VCC + 0.5 V |
±25 |
mA | |
| ICC | quiescent supply current |
75 |
mA | ||
| IGND | ground current |
-75 |
mA | ||
| Tstg | storage temperature |
-65 |
+150 |
||
| Ptot | total power dissipation | Tamb = -40 to +125 |
500 |
mW |
74ABH16244ADGG
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