MFG:FAIRCHILD Package Cooled:TSSOP D/C:03+
MFG: FAIRCHILD
Package Cooled: TSSOP
D/C: 03+
Description: The ALVC162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applicat...
The ALVC162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear to be transparent to the data when the Latch enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.
The ALVC162373 is also designed with 26 resistors in the outputs. This design reduces line noise in applications such as memory address drivers, clock drivers and bus transceivers/transmitters.
The 74ALVC162373 is designed for low voltage (1.65V to 3.6V) VCC applications with I/O compatibility up to 3.6V.
The 74ALVC162373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining low CMOS power dissipation.
74ALVC162373
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74ALVC162334PAG8, 16BIT BUS DRIVER48-PIN
74ALVC162334PAG, 16BIT BUS DRIVER48-PIN
IC UNIV BUS DVR 16BIT 48TSSOP
IC UNIV BUS DVR 16BIT 48TSSOP
The 74ALVC162334A is an 16-bit universal bus driver. Data flow is controlled by active low output enable (OE), active low latch enable (LE) and clock inputs (CP).When LE is LOW, the A to Y data flow is transparent. When LE of the 74ALVC162334A is HIGH and CP...
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