74F521MSA

74F521

The 74F521 is an expandable 8-bit comparator. It com-pares two words of up to eight bits each and provides a LOW output when the two words match bit for bit. The expansion input IA=B also serves as an active LOW enable input.

74F51SC

The 74F51SC contains two independent logic units, one performing a 2-2 AND-OR-INVERT and the other performing a 3-3 AND-OR-INVERT function.

74F5074

The 74F5074 is a dual positive edgetriggered Dtype featuring individual data, clock, set and reset inputs; also true and complementary outputs.Set (SD n) and reset (RD n) are asynchronous active low inputs and operate independently of the clock (CPn) input. ...

74F50729

The 74F50729 is a dual positive edgetriggered Dtype featuring individual data, clock, set and reset inputs; also true and complementary outputs.The 74F50729 is designed so that the outputs can never display a metastable state due to setup and hold time viola...

74F50728

The 74F50728 is a cascaded dual positive edgetriggered Dtype featuring individual data, clock, set and reset inputs; also true and complementary tputs.Set (SDn) and reset (RDn) are asynchronous active low inputs and operate independently of the clock (CPn) i...

74F50109