74F573

Applications that are described herein for any of these products are for illustrative purposes only. PhilipsSemiconductors make no representation or warranty that such applications will be suitable for the specified use without further testing or modification.

The 74F573 is an octal transparent latch coupled to eight 3-State output buffers. The two sections of the device are controlled independently by Enable (E) and Output Enable (OE) control gates.

The 74F573 is functionally identical to the 74F373 but has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocessors.

The data of the 74F573 on the D inputs is transferred to the latch outputs when the Enable (E) input is High. The latch remains transparent to the data input while E is High and stores the data that is present one setup time before the High-to-Low enable transition.

The 3-State output buffers of the 74F573 are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active Low Output Enable (OE) controls all eight 3-State buffers independent to the latch operation. When OE is Low, the latched or transparent data appears at the outputs. When OE is High, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.

The 74F573 is functionally identical to the 74F374 but has a broadside pinout configuration to facilitate PC board layout and allow easy interface with microprocesors.

It is an 8-bit, edge triggered register of the 74F573 coupled to eight 3-State output buffers. The two sections of the device are controlled independently by the clock (CP) and Output Enable (OE) control gates.

The register of the 74F573 is fully edge-triggered. The state of each D input, one setup time before the Low-to-High clock transition is transferred to the corresponding flip-flop's Q output.

The 3-State output buffers of the 74F573 are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. The active Low Output Enable (OE) controls all eight 3-State buffers independently of the latch operation. When OE is Low, the latchedor transparent data appears at the outputs. When OE is High, the outputs are in high impedance "off" state, which means they will neither drive nor load the bus.