74FCT3573/A

Features: •0.5 MICRON CMOS Technology•ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•25 mil Center SSOP Packages•Extended commercial range of -40to +85•VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7V to 3.6V, Extended Range&...

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74FCT3573/A Picture
SeekIC No. : 004250273 Detail

74FCT3573/A: Features: •0.5 MICRON CMOS Technology•ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)•25 mil Center SSOP Packages•Extended comme...

floor Price/Ceiling Price

Part Number:
74FCT3573/A
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/28

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Product Details

Description



Features:

•0.5 MICRON CMOS Technology
•ESD > 2000V per MIL-STD-883, Method 3015; > 200V using machine model (C = 200pF, R = 0)
•25 mil Center SSOP Packages
•Extended commercial range of -40to +85
•VCC = 3.3V ±0.3V, Normal Range or VCC = 2.7V to 3.6V, Extended Range
•CMOS power levels (0.4mW typ. static)
•Rail-to-Rail output swing for increased noise margin
•Military product compliant to MIL-STD-883, Class B




Pinout

  Connection Diagram


Specifications

Symbol Rating Commercial Military Unit
VTER(2) Terminal Voltage
with Respect toGND
0.5 to +4.6 0.5 to +7.0 V
VTER(3) Terminal Voltage
with Respect toGND
0.5 to +7.0 0.5 to +7.0 V
VTER(4) Terminal Voltagewith Respectto GND 0.5 to
VCC + 0.5
0.5 to
VCC + 0.5
V
TA OperatingTemperature 40 to +85 55 to +125
TBIAS TemperatureUnder Bias 55 to +125 65 to +135
TSTG StorageTemperature 55 to +125 65 to +150
PT Power Dissipation 1.0 1.0 W
IOUT DC Output Current 60 to +60 60 to +60 mA



Description

The 74FCT3573/A is octal transparent latches built using an advanced dual metal CMOS technology.

These octal latches of the 74FCT3573/A have 3-state outputs and are intended for bus oriented applications. The flip-flops appear transparent to the data when Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the set-up time is latched. Data appears on the bus when the Output Enable (OE) is LOW. hen OEis HIGH, the bus output is in the high-impedance tate.




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