Purchase 74HC573, In-stock 74HC573 From SeekIC.
Package Cooled:SOP5.2
Part Number: 74HC573
Package Cooled: SOP5.2
Description: The M54/74HC563 andM54HC573 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS ...
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74HC573
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DataSheet
General Description
74HC573 General Description
The M54/74HC563 andM54HC573 are high speed CMOS OCTAL LATCH WITH 3-STATE OUTPUTS fabricated with in silicon gate C2MOS technology.
These ICs archive the high speed operation similar to equivalent LSTTL while maintaning the CMOS low power dissipation.
These 8 bit D-Type latches are controlled by a latch enable input (LE) and a output enable input (OE). While the LE input is held at a high level, the Q outputs will follow the data input precisely or inversely. When the LE is taken low, the Q outputs will be latched precisely or inversely at the logic level of D input data. While the OE input is at low level, the eight outputs will be in a normal logic state (high or low logic level) and while high level the outpts will be in a high impedance state.
The application designer has a choise of combination of inverting and non inverting outputs.
The three state output configuration and the wide choise of outline make bus organized system simple.
All inputs are equipped with protection circuits against discharge and transient excess voltage.
74HC573 Maximum Ratings
| Symbol | Parameter | Value | Unit |
| VCC | Supply Voltage | -0.5 to +7 | V |
| VI | DC Input Voltage | -0.5 to VCC + 0.5 | V |
| VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
| IIK | DC Input Diode Current | ± 20 | mA |
| IOK | DC Output Diode Current | ± 20 | mA |
| IO | DC Output Source Sink Current Per Output Pin | ± 35 | mA |
| ICC or IGND | DC VCC or Ground Current | ± 70 | mA |
| PD | Power Dissipation | 500 (*) | mW |
| Tstg | Storage Temperature | -65 to +150 | o C |
| TL | Lead Temperature (10 sec) | 300 | o C |
74HC573 Features
HIGH SPEED
tPD = 13 ns (TYP.) AT VCC = 5 V LOWPOWER DISSIPATION
ICC = 4 mA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
IOL = zIOHz= 6 mA (MIN.) BALANCEDPROPAGATION DELAYS
tPLH = tPHL WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS563/573
tPD = 13 ns (TYP.) AT VCC = 5 V LOWPOWER DISSIPATION
ICC = 4 mA (MAX.) AT TA = 25 °C HIGH NOISE IMMUNITY
VNIH = VNIL = 28 % VCC (MIN.) OUTPUT DRIVE CAPABILITY
15 LSTTL LOADS SYMMETRICAL OUTPUT IMPEDANCE
IOL = zIOHz= 6 mA (MIN.) BALANCEDPROPAGATION DELAYS
tPLH = tPHL WIDE OPERATING VOLTAGE RANGE
VCC (OPR) = 2 V TO 6 V PIN AND FUNCTION COMPATIBLE WITH 54/74LS563/573
74HC573 Connection Diagram
74HC573D
PDF/DataSheet Download
- Datasheet: 74HC573D
- File Size: 62704 KB
- Manufacturer: PHILIPS [ Philips Semiconductors ]
- Click here to Download
- ·74H00
- ETC [ETC]
- QUAD 2-INPUT NAND GATE
- 62068 KB
- ·74H00DC
- ETC [ETC]
- QUAD 2-INPUT NAND GATE
- 62068 KB
- ·74H00FC
- ETC [ETC]
- QUAD 2-INPUT NAND GATE
- 62068 KB
- ·74H00PC
- ETC [ETC]
- QUAD 2-INPUT NAND GATE
- 62068 KB
- ·74H11
- ETC [ETC]
- TRIPLE 3-INPUT AND GATE
- 57988 KB
- ·74H11DC
- ETC [ETC]
- TRIPLE 3-INPUT AND GATE
- 57988 KB
- ·74H11FC
- ETC [ETC]
- TRIPLE 3-INPUT AND GATE
- 57988 KB
- ·74H11PC
- ETC [ETC]
- TRIPLE 3-INPUT AND GATE
- 57988 KB
74HC573 Relative Products
74HC564N,652
IC D F-F POS EDGE TRIGGER 20-DIP
74HC564D,653
IC D F-F POS EDGE TRIGGER 20SOIC
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74HC564D,652
IC D F-F POS EDGE TRIGGER 20SOIC
74HC564
The 74HC564 is high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.The 74HC564 is octal D-type flip-flops featuring separate D-type inputs for each flip-flop ...
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74HC563N,652
IC LATCH OCTAL D 3STATE 20DIP
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74HC563D,653
IC LATCH TRANSP OCT D 3ST 20SOIC
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