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MFG:PHI  Package Cooled:SMD-14  

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Part Number: 74HCT03

 

MFG: PHI

Package Cooled: SMD-14

 

Description: The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL ...


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74HCT03 General Description


The 74HC/HCT03 are high-speed Si-gate CMOS devices and are pin compatible with low power Schottky TTL (LSTTL). They are specified in compliance with JEDEC standard no. 7A.

The 74HC/HCT03 provide the 2-input NAND function.

The 74HC/HCT03 have open-drain N-transistor outputs, which are not clamped by a diode connected to VCC. In the OFF-state, i.e. when one input is LOW, the output may be pulled to any voltage between GND and VOmax. This allows the device to be used as a LOW-to-HIGH or HIGH-to-LOW level shifter. For digital operation and OR-tied output applications, these devices must have a pull-up resistor to establish a logic HIGH level.

74HCT03 Maximum Ratings

Limiting values in accordance with the Absolute Maximum System (IEC 134)
Voltages are referenced to GND (ground = 0 V)
SYMBOL PARAMETER MIN. MAX. UNIT CONDITIONS
VCC DC supply voltage -0.5 +7 V  
VO DC output voltage -0.5 +7 V  
IIK DC input diode current   20 mA for VI < -0.5 V or VI > VCC + 0.5 V
-IOK DC output diode current   20 mA for VO < -0.5 V
-IO DC output sink current   25 mA for - 0.5 V < VO
±ICC;
±IGND
DC VCC or GND current   50 mA  
Tstg storage temperature range -65 +150 °C  
Ptot

power dissipation per package

plastic DIL

  750 mW for temperature range; -40 to +125 °C
74HC/HCT
above +70 °C: derate linearly with 12 mW/K
plastic mini-pack (SO)   500 mW above +70 °C: derate linearly with 8 mW/K

74HCT03 Features

· Level shift capability
· Output capability: standard (open drain)
· ICC category: SSI

74HCT03 Connection Diagram

74HCT03  Connection Diagram

74HCT03 datasheet

74H00
PDF/DataSheet Download

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