74LCX273

Features:

 5V tolerant inputs and outputs
 10 mA I_CCQ max
 Power-down high impedance inputs and outputs
 Supports live insertion/withdrawal
 2.0V±3.6V V_CC supply operation
 ±24 mA output drive
 Implements patented Quiet SeriesTM noise/EMI reduction circuitry
 Functionally compatible with the 74 series 273
 Latch-up performance exceeds 500 mA
 ESD performance:
  Human Body Model l 2000V
  Machine Model l 200V


Pinout




Description

   The 74LCX273 has eight edge-triggered D-type flip-flops with individual D inputs and Q outputs. The common buffered Clock (CP) and Master Reset (MR) input load and reset (clear) all flip-flops simultaneously.

   The register of the 74LCX273 is fully edge-triggered. The state of each D input, one setup time before the LOW-to-HIGH clock transition, is transferred to the corresponding flip-flop's Q output.

   All outputs of the 74LCX273 will be forced LOW independently of Clock or Data inputs by a LOW voltage level on the MR input. The device is useful for applications where the true output only is required and the Clock and Master Reset are common to all storage elements.

   The 74LCX273 is designed for low voltage (3.3V) V_CC applications with capability of interfacing to a 5V signal environment.The LCX273 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.