74LCXH16373

Features:

`5V tolerant control inputs and outputs
`3.3V3.6V V_CC specifications provided
`5.4 ns tPD max (V<sub>CC</sub> = 3.3V), 20 µA I<sub>CC</sub> max
`Bushold on inputs eliminates the need for external pull-up/pull-down resistors
`Power down high impedance outputs
`±24 mA output drive (V_CC = 3.0V)
`Implements patented noise/EMI reduction circuitry
`Latch-up performance exceeds 500 mA
`ESD performance:
`Human body model > 2000V
`Machine model > 200V
`Also available in plastic Fine-Pitch Ball Grid Array(FBGA) (Preliminary)


Pinout




Specifications

Symbol	Parameter	Value	Conditions	Units
VCC	Supply Voltage	−0.5 to +7.0		V
VI	DC Input Voltage I0 - I15 OEn, LEn	−0.5 to VCC + 0.5 −0.5V to 7.0V		V
VO	DC Output Voltage	−0.5 to +7.0 −0.5 to VCC + 0.5	Output in 3-STATE Output in HIGH or LOW State (Note 4)	V
IIK	DC Input Diode Current	−50	VI < GND	mA
IOK	DC Output Diode Current	−50 +50	VO < GND VO > VCC	mA
IO	DC Output Source/Sink Current	+50		mA
ICC	DC Supply Current per Supply Pin	±100		mA
IGND	DC Ground Current per Ground Pin	±100		mA
TSTG	Storage Temperature	−65 to +150		°C

Description

The 74LCXH16373 contains sixteen non-inverting latcheswith 3-STATE out puts and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs of the 74LCXH16373 are in a high impedance state.

The 74LCXH16373 is designed for low voltage (2.5V or 3.3V)V_CC applications with capability of interfacing to a 5V signal environment.

The 74LCXH16373 is fabricated with an advanced CMOS technology to achieve high speed operation while maintaining CMOS low power dissipation.

The 74LCXH16373 data inputs include active bushold circuitry,eliminating the need for external pull-up resistors to hold unused or floating data input at a valid logic level.