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74LVC1G14

Features: ` Wide supply voltage range from 1.65 V to 5.5 V` High noise immunity` Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V).` ±24 mA output drive (VCC = 3.0 V)` CMOS low power consumption` Latch-up performance exceeds 250 mA`...

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SeekIC No. : 004251270 Detail

74LVC1G14: Features: ` Wide supply voltage range from 1.65 V to 5.5 V` High noise immunity` Complies with JEDEC standard: JESD8-7 (1.65 V to 1.95 V) JESD8-5 (2.3 V to 2.7 V) JESD8B/JESD36 (2.7 V to 3.6 V).`...

74LVC1G14 Data Sheet

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Part Number:
74LVC1G14
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
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Product Details

Description



Features:

` Wide supply voltage range from 1.65 V to 5.5 V
` High noise immunity
` Complies with JEDEC standard:
  JESD8-7 (1.65 V to 1.95 V)
  JESD8-5 (2.3 V to 2.7 V)
  JESD8B/JESD36 (2.7 V to 3.6 V).
` ±24 mA output drive (VCC = 3.0 V)
` CMOS low power consumption
` Latch-up performance exceeds 250 mA
` Direct interface with TTL levels
` Unlimited rise and fall times
` Input accepts voltages up to 5 V
` Multiple package options
` ESD protection:
  HBM EIA/JESD22-A114-B exceeds 2000 V
  MM EIA/JESD22-A115-A exceeds 200 V.
` Specified from -40 °C to +85 °C and
  -40 °C to +125 °C.


Pinout

Connection Diagram


Specifications

SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT
VCC supply voltage   -0.5 +6.5 V
IIK input diode current VI < 0 - -50 mA
VI input voltage  note 1 -0.5 +6.5 V
IOK output diode current  VO > VCC or VO < 0 - ±50 mA
VO output voltage active mode; notes 1 and 2 -0.5 VCC + 0.5 V
Power-down mode; notes 1 and 2 -0.5 +6.5 V
IO output source or sink current VO = 0 to VCC - ±50 mA
ICC, IGND VCC or GND current   - ±100 mA
Tstg storage temperature   -65 +150 °C
Ptot power dissipation Tamb = -40 °C to +125 °C - 300 mW

Notes
1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
2. When VCC = 0 V (Power-down mode), the output voltage can be 5.5 V in normal operation.




Description

The 74LVC1G14 is a high-performance, low-power,low-voltage, Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

The input can be driven from either 3.3 V or 5 V devices.This feature allows the use of this device in a mixed 3.3 V and 5 V environment.

Schmitt-trigger action of the 74LVC1G14 at the input makes the circuit tolerant for slower input rise and fall time.

This device is fully specified for partial power-down applications using Ioff. The Ioff circuitry disables the output,preventing the damaging backflow current through the device when it is powered down.

The 74LVC1G14 provides the inverting buffer function with Schmitt-trigger action.




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