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74LVC377

Features: • Wide supply voltage range of 1.2V to 3.6V• Conforms to JEDEC standard 8-1A• Inputs accept voltages up to 5.5V• CMOS low power consumption• Direct interface with TTL levels• Output drive capability 50W transmission lines @ 85°CPinoutSpecifications ...

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SeekIC No. : 004251345 Detail

74LVC377: Features: • Wide supply voltage range of 1.2V to 3.6V• Conforms to JEDEC standard 8-1A• Inputs accept voltages up to 5.5V• CMOS low power consumption• Direct interface ...

74LVC377 Data Sheet

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Part Number:
74LVC377
Supply Ability:
5000

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  • 1~5000
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  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

• Wide supply voltage range of 1.2V to 3.6V
• Conforms to JEDEC standard 8-1A
• Inputs accept voltages up to 5.5V
• CMOS low power consumption
• Direct interface with TTL levels
• Output drive capability 50W transmission lines @ 85°C


Pinout

Connection Diagram


Specifications

Symbol
Parameter
CONDITIONS
RATING
Unit
VCC
DC Supply Voltage
-0.5 to +4.6
V
IIK
DC input diode current
VI <0
50
mA
VI
DC input voltage
For all inputs1
-0.5 to +4.6
V
VI/O
DC input voltage range for I/Os
0.5 to VCC +0.5
V
IOK
DC output diode current
VO >VCC or VO< 0
±50
mA
VO
DC output voltage;
output HIGH or LOW state
Note 2
-0.5 to VCC + 0.5
V
IO
DC output source or sink current
VO = 0 to VCC
± 50
mA
ICC or IGND
DC VCC or Ground Currentper
± 100
mA
Tstg
Storage temperature range
-65 to +150
PTOT
Power dissipation per package
plastic mini-pack (SO)
plastic shrink mini-pack (SSOP and TSSOP)
above +70°C derate linearly with 8 mW/K
above +60°C derate linearly with 5.5 mW/K
500
500
mW
1. Stresses beyond those listed may cause permanent damage to the device. These are stress ratings only and functional operation of the
device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to
absolute-maximum-rated conditions for extended periods may affect device reliability.
2. The input and output voltage ratings may be exceeded if the input and output current ratings are observed.


Description

The 74LVC377 is a low-voltage Si-gate CMOS device, superior to most advanced CMOS compatible TTL families.

The 74LVC377 has eight edge-triggered , D-type flip-flops with individual D inputs and Q outputs. A common clock (CP) input loads all flip-flops simultaneously when the data enable E is LOW. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. The E input must be stable only one set-up time prior to the LOW-to-HIGH transition for predictable operation.




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