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MFG:ST Package Cooled:SOP


Part Number: 74LVQ11
MFG: ST
Package Cooled: SOP
Description: The 74LVQ11 is a low voltage CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and ...
MFG:ST Package Cooled:SOP


MFG: ST
Package Cooled: SOP
Description: The 74LVQ11 is a low voltage CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and ...
The 74LVQ11 is a low voltage CMOS TRIPLE 3-INPUT AND GATE fabricated with sub-micron silicon gate and double-layer metal wiring C2MOStechnology. It is ideal for low power and low noise 3.3V applications.
The internal circuit is composed of 3 stages including buffer output, which enables high noise immunity and stable output.
All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage.
| SYMBOL | PARAMETER | Value | UNIT |
| VCC | Supply voltagee | 0.5 to+ 7 | V |
| VI | DC Input Voltage | -0.5 to VCC + 0.5 | V |
| VO | DC Output Voltage | -0.5 to VCC + 0.5 | V |
| IIK | DC Input Diode Current | ± 20 | mA |
| IOK | DC Output Diode Current | ± 20 | mA |
| IO | DC Output Current | ± 50 | mA |
| ICC or IGND | DC VCC or Ground Current | ± 200 | mA |
| Tstg | Storage temperature | 65 to 150 | |
TL |
Lead Temperature (10 sec) | 300 |
·HIGH SPEED: tPD = 4.7ns (TYP.) at VCC = 3.3 V
·COMPATIBLE WITH TTL OUTPUTS
·LOW POWER DISSIPATION: ICC = 2mA (MAX.) at TA=25°C
·LOW NOISE: VOLP = 0.3V (TYP.) at VCC = 3.3V
·75W TRANSMISSION LINE DRIVING CAPABILITY
·SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 12mA (MIN) at VCC = 3.0 V
·PCI BUS LEVELS GUARANTEED AT 24 mA
·BALANCED PROPAGATIO·DELAYS: tPLH @ tPHL
·OPERATING VOLTAGE RANGE: VCC(OPR) = 2V to 3.6V (1.2V Data Retention)
·PIN ND FUNCTION COMPATIBLE WITH 74 SERIES 11
·IMPROVED LATCH-UP IMMUNITY
74LVQ11
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