74LVTH162373

` Input and output interface capability to systems at 5V VCC
` Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs
` Live insertion/extraction permitted
` Power Up/Down high impedance provides glitch-free bus loading
` Outputs include equivalent series resistance of 25 to make external termination resistors unnecessary and
reduce overshoot and undershoot
` Functionally compatible with the 74 series 16373
` Latch-up performance exceeds 500 mA
` ESD performance:
    Human-body model > 2000V
    Machine model > 200V
    Charged-device model > 1000V

The 74LVTH162373 contains sixteen non-inverting latches with 3-STATE outputs and is intended for bus oriented applications. The device is byte controlled. The flip-flops appear transparent to the data when the Latch Enable (LE) is HIGH. When LE is LOW, the data that meets the setup time is latched. Data appears on the bus when the Output Enable (OE) is LOW. When OE is HIGH, the outputs are in a high impedance state.

The 74LVTH162373 is designed with equivalent 25 series resistance in both the HIGH and LOW states of the output.

This design reduces line noise in applications such as memory address drivers, clock drivers, and bus transceivers/ transmitters.

The 74LVTH162373 data inputs include bushold, eliminating the need for external pull-up resistors to hold unused inputs.

These latches are designed for low-voltage (3.3V) VCC applications, but with the capability to provide a TTL interface to a 5V environment. The 74LVTH162373 is fabricated with an advanced BiCMOS technology to achieve high speed operation similar to 5V ABT while maintaining a low power dissipation.