74LVTH573

The 74LVTH573 consists of eight latches with 3-STATE outputs for bus organized system applications. The feature of 74LVTH573 are as follows: (1)Input and output interface capability to systems at 5V VCC; (2)Bushold data inputs eliminate the need for external pull-up resistors to hold unused inputs (74LVTH573), also available without bushold feature (74LVT573); (3)Live insertion/extraction permitted; (4)Power Up/Down high impedance provides glitch-free bus loading; (5)Outputs source/sink -32 mA/+64 mA; (6)Functionally compatible with the 74 series 573; (7)Latch-up performance exceeds 500 mA; (8)ESD performance: Human-body model ! 2000V, Machine model ! 200V, Charged-device model ! 1000V.

The absolute maximum ratings of the 74LVTH573 are: (1)Supply Voltage: -0.5 to +4.6 V; (2)DC Input Voltage: -0.5 to +7.0 V; (3)DC Output Voltage -0.5 to +7.0; (4)DC Input Diode Current: -50mA; (5)DC Output Diode Current: -50mA; (6)DC Output Current: 64mA; (7)DC Supply Current per Supply Pin: ±64 mA; (8)DC Ground Current per Ground Pin: ±128 mA; (9)Storage Temperature: -65 to +150.

The following is about the electrical characteristics of 74LVTH573: (1)Input Clamp Diode Voltage: -1.2 V max at II=-18 mA; (2)Input HIGH Voltage: 2.0 V min at VO 0.1V or VO VCC - 0.1V; (3)Output HIGH Voltage: VCC-0.2V min at IOH=-100 A; (4)Output LOW Voltage: 0.2V max at IOH=100 A; (5)Bushold Input Minimum Drive: 75A at VI= 0.8V; (6)Power Off Leakage Current: ±100 A at 0V VI or VO 5.5V; (7)3-STATE Output Leakage Current: -5 A at VO=0.5V.