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MFG:N/A  Package Cooled:QFP  D/C:08+  

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Part Number: A54SX16-2

 

MFG: N/A

Package Cooled: QFP

D/C: 08+

Description: The Arbiter core is used to efficiently manage access to a PCI bus that is shared by several masters. ...


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A54SX16-2 General Description


The Arbiter core is used to efficiently manage access to a PCI bus that is shared by several masters. Access to the PCI bus is automatically determined by the individual priorities of each master.

In the most common application, customers use an embedded processor as the master with highest priority and a pure-rotation arbitration scheme among other PCI bus masters. The networking and telecom markets are the targets for this macro.

A54SX16-2 Features

• Support for up to Five PCI Bus Masters
• Support for Two Arbitration Schemes
   Pure Rotation
   Fair Rotation
• Support for Bus Parking
• Hidden Bus Arbitration
• Interface with 33 MHz and 66 MHz PCI Systems
• Implementation in Actel's SX, SX-A, ProASIC and ProASICPLUS Families
• Synthesizable VHDL Source Code
• Device Utilization
   SX/SX-A 100-150 Modules
   ProASIC/ProASICPLUS 124-135 Tiles

A54SX16-2 datasheet

A54SX16-2BG208
PDF/DataSheet Download

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