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Part Number: A61L73081

 

 

 

 

Description: The A61L73081 is a high-speed 1,048,576-bit static random access memory organized as 131,072 words by ...


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A61L73081 General Description


The A61L73081 is a high-speed 1,048,576-bit static random access memory organized as 131,072 words by 8 bits and operates on a 3.3V power supply. It is built using high performance CMOS process.

Inputs and three-state outputs are TTL compatible and allow for direct interfacing with common system bus structures.

Minimum standby power is drawn by this device when chip enable is disable, independent of the other input levels.

Data retention is guaranteed at a power supply voltage as low as 2V.

A61L73081 Maximum Ratings

VCC to GND . . . . . . . . . . . . . . . . . . . . . . -0.5V to +4.6V
IN, IN/OUT Volt to GND . . . . . . . . . . -0.5V to VCC +0.5V
Operating Temperature, Topr . . . . . . . . 0°C to +70°C
Storage Temperature, Tstg . . . . . . . -55°C to +125°C
Temperature Under Bias, Tbias . . . . . -10°C to +85°C
Power Dissipation, PT . . . . . . . . . . . . . . . . . . . . . . 0.7W

A61L73081 Features

·Center power pinout
·Supply voltage: 3.3V±10%
·Access times: 12/15 ns (max.)
·Current: Operating: -12: 220mA (max.)
  -15: 210mA (max.)
  Standby: TTL: 25mA (max.)
  CMOS: 12mA (max.)
·Full static operation, no clock or refreshing required
·All inputs and outputs are directly TTL compatible
·Common I/O using three-state output
·Data retention voltage: 2V (min.)
·Available in 32-pin 300mil / 400mil SOJ packages

A61L73081 Connection Diagram

A61L73081  Connection Diagram

A61L73081 datasheet

A61L73081
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