Features: ·Four 14-Bit DACs in One Package
·Voltage Outputs
·Separate Offset Adjust for Each Output
·Reference Range of ±5 V
·Maximum Output Voltage Range of ±10 V
·Clear Function to User-Defined Code
·44-Pin MQFP Package
Application·Process Control
·Automatic Test Equipment
·General Purpose Instrumentation
Pinout
SpecificationsVCC to DGND . . . . . . . . . . . . .0.3 V, +7 V or VDD + 0.3 V
(Whichever Is Lower)
VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . 0.3 V, +17 V
VSS to AGND . . . . . . . . . . . . . . . . . . . . . . . . +0.3 V, 17 V
AGND to DGND . . . . . . . . . . . . . . . . . . ... . . 0.3 V, +0.3 V
Digital Inputs to DGND . . . . . . . . . . . . 0.3 V, VCC + 0.3 V
VREF(+) to VREF() . . . . . . . . . . . . . . . . . . . 0.3 V, +18 V
VREF(+) to AGND . . . . . . . . . . . . . VSS 0.3 V, VDD + 0.3 V
VREF() to AGND . . . . . . . . . . . . . VSS 0.3 V, VDD + 0.3 V
DUTGND to AGND . . . . . . . . .... . . VSS 0.3 V, VDD + 0.3 V
VOUT (AD) to AGND . . . . . . .. . . VSS 0.3 V, VDD + 0.3 V
Operating Temperature Range
Industrial (A Version) . . . . . . . . . . . 40°C to +85°C
Storage Temperature Range . . . . . . . . 65°C to +150°C
Junction Temperature . . . . . . . . . . . . . . . . . . . . . .+150°C
MQFP Package, Power Dissipation . . . . . . . . . . . . 480 mW
JA Thermal Impedance . . . . . . . . . . . . . . . . . . 95°C/W
Lead Temperature, Soldering
Vapor Phase (60 sec) . . . . . . . . . . . . .. . . . . . . .+215°C
Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . .+220°C
| Resolution (Bits) |
14bit |
| DAC Update Rate |
62.5kSPS |
| DAC Settling Time |
16s |
| # DAC Outputs |
4 |
| DAC Type |
Voltage Out |
| DAC Input Format |
Par |
| Output FSR |
User Def. Range/Offset |
| Ref Int/Ext |
Ext |
| Supply Vnom |
Multi(±15, +5Dig) |
| Pwr Diss |
460mW |
| Package |
QFP |
DescriptionThe AD7836 contains four 14-bit DACs on one monolithic chip. It has output voltages with a full-scale range of ±10 V from reference voltages of ±5 V.
The AD7836 accepts 14-bit parallel loaded data from the external bus into one of the input latches under the control of the WR, CS and DAC channel address pins, A0A2.
The DAC AD7836 outputs are updated individually, on reception of new data. In addition, the SEL input can be used to apply the user programmed value in DAC Register E to all DACs, thus setting all DAC output voltages to the same level. The contents of the DAC data registers are not affected by the SEL input.
Each DAC AD7836 output is buffered with a gain of two amplifier into which an external DAC offset voltage can be inserted via the DUTGNDx pins.
The AD7836 is available in a 44-lead MQFP package.
AD7836 Data Sheet
