AD8159ASVZ

The AD8159ASVZ is a type of asynchronous, protocol agnostic, quad-lane 2:1 switch with a total of 12 differential PECL/CML-compatible inputs and 12 differential CML outputs. The operation of this product is optimized for NRZ signaling with data rates up to 3.2 Gbps per lane. Each lane offers two levels of input equalization and four levels of output pre-emphasis.

Features of the AD8159ASVZ are:(1)port level 2:1 mux/1:2 demux; (2)each port consists of 4 lanes; (3)each lane runs from dc to 3.2 Gbps, independent of the other lanes; (4)compensates over 40 inches of FR4 at 3.2 Gbps through two levels of input equalization, or four levels of output pre-emphasis; (5)accepts ac- or dc-coupled differential CML inputs; (6)low deterministic jitter, typically 20 ps p-p; (7)low random jitter, typically 1 ps rms; (8)BER < 10-16; (9)on-chip termination; (10)reversible inputs and outputs on one port; (11)unicast or bicast on 1:2 demux function; (12)port level loopback capability; (13)single lane switching capability.

The absolute maximum ratings of the AD8159ASVZ can be summarized as:(1): VCC to VEE is 3.7 V; (2): VTTI is VCC + 0.6 V; (3): VTTIO is VCC + 0.6 V; (4): VTTO is VCC + 0.6 V; (5): VTTOI is VCC + 0.6 V; (6): internal power dissipation is 4.26 W; (7): differential input voltage is 2.0 V; (8): logic input voltage : VEE . 0.3 V < VIN < VCC + 0.6 V; (9): storage temperature range is -65°C to +125°C; (10): lead temperature is 300°C.