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MFG:ADI  D/C:09  

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Part Number: AD9751

 

MFG: ADI

 

D/C: 09

Description: The AD9751 is a dual muxed port, ultrahigh-speed, single-channel, 10-bit CMOS DAC. It integrates a high-quality 10-b...


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AD9751 General Description


The AD9751 is a dual muxed port, ultrahigh-speed, single-channel, 10-bit CMOS DAC. It integrates a high-quality 10-bit TxDAC+core, a voltage reference, and digital interface circuitry into a small 48-lead LQFP package. The AD9751 offers excep-tional ac and dc performance while supporting update rates up to 300 MSPS.

The AD9751 has been optimized for ultrahigh-speed applica-tions up to 300 MSPS where data rates exceed those possible on a single data interface port DAC. The digital interface consists
of two buffered latches as well as control logic. These latches can be time multiplexed to the high-speed DAC in several ways. This PLL drives the DAC latch at twice the speed of the exter-
nally applied clock and is able to interleave the data from the two input channels. The resulting output data rate is twice that of the two input channels. With the PLL disabled, an external
2* clock may be supplied and divided by two internally.The CLK inputs (CLK+/CLK) can be driven either differen-tially or single-endedly, with a signal swing as low as 1 V p-p.

The DAC utilizes a segmented current source architecture com-bined with a proprietary switching technique to reduce glitch energy and to maximize dynamic accuracy. Differential current
outputs support single-ended or differential applications. The differential outputs each provide a nominal full-scale current from 2 mA to 20 mA.

The AD9751 is manufactured on an advanced low cost 0.35m CMOS process. It operates from a single supply of 3.1 V to 3.5V and consumes 155 mW of power.

AD9751 Maximum Ratings

Parameter With Respect to Min Max Unit
AVDD, DVDD, CLKVDD, PLLVDD
AVDD, DVDD, CLKVDD, PLLVDD
ACOM, DCOM, CLKCOM, PLLCOM
REFIO, REFLO, FSADJ
IOUTA, IOUTB
Digital Data Inputs (DB9 to DB0)
CLK+/CLK, PLLLOCK
DIV0, DIV1, RESET
LPF
Junction Temperature
Storage Temperature
Lead Temperature (10 sec)
ACOM, DCOM, CLKCOM, PLLCOM
ACOM, DCOM, CLKCOM, PLLCOM
ACOM, DCOM, CLKCOM, PLLCOM
ACOM
ACOM
DCOM
CLKCOM
CLKCOM
PLLCOM

0.3
3.9
0.3
0.3
1.0
0.3
0.3
0.3
0.3

65

+3.9
+3.9
+3.9
AVDD + 0.3
AVDD + 0.3
DVDD + 0.3
CLKVDD + 0.3
CLKVDD + 0.3
PLLVDD + 0.3
150
+150
300
V
V
V
V
V
V
V
V
V
°C
°C
°C

AD9751 Features

10-Bit Dual Muxed Port DAC
300 MSPS Output Update Rate
Excellent SFDR and IMD Performance
SFDR to Nyquist @ 25 MHz Output: 64 dB
Internal Clock Doubling PLL
Differential or Single-Ended Clock Input
On-Chip 1.2 V Reference
Single 3.3 V Supply Operation
Power Dissipation: 155 mW @ 3.3 V
48-Lead LQFP

AD9751 Typical Application

Communications: LMDS, LMCS, MMDS
Base Stations
Digital Synthesis
QAM and OFDM

AD9751 Connection Diagram

AD9751  Connection Diagram

AD9751 datasheet

AD9751
PDF/DataSheet Download

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