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Part Number: AD9787

 

MFG: ADI

 

D/C: 09

Description: The AD9785/AD9787/AD9788 are 12-bit, 14-bit, and 16-bit, high dynamic range TxDAC® devices, respec...


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AD9787 General Description


The AD9785/AD9787/AD9788 are 12-bit, 14-bit, and 16-bit, high dynamic range TxDAC® devices, respectively, that provide a sample rate of 800 MSPS, permitting multicarrier generation up to the Nyquist frequency. Features are included for optimizing direct conversion transmit applications, including complex digital modulation, as well as gain, phase, and offset compens-ation. The DAC outputs are optimized to interface seamlessly with analog quadrature modulators, such as the ADL537x family from Analog Devices, Inc. A serial peripheral interface (SPI) provides for programming and readback of many internal parameters. Full-scale output current can be programmed over a range of 10 mA to 30 mA. The AD978x family is manufactured on a 0.18 m CMOS process and operates from 1.8 V and 3.3 V supplies. It is enclosed in a 100-lead TQFP package.

AD9787 Maximum Ratings

Parameter Rating
AVDD33 to AGND, DGND, CGND
DVDD33, DVDD18, CVDD18 to AGND, DGND, CGND
AGND to DGND, CGND
DGND to AGND, CGND
CGND to AGND, DGND
I120, VREF, IPTAT to AGND
OUT1_P, OUT1_N, OUT2_P, OUT2_N, AUX1_P, AUX1_N, AUX2_P, AUX2_N to AGND
P1D[15] to P1D[0], P2D[15] to P2D[0] to DGND
DATACLK, TXENABLE to DGND
REFCLK+, REFCLK−, RESET, IRQ, PLL_LOCK, SYNC_O+, SYNC_O−, SYNC_I+, SYNC_I− to CGND
RESET, IRQ, PLL_LOCK, SYNC_O+, SYNC_O−, SYNC_I+, SYNC_I−, SPI_CSB, SCLK, SPI_SDIO, SPI_SDO to DGND
Junction Temperature
Storage Temperature Range
−0.3 V to +3.6 V
−0.3 V to +2.1 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−0.3 V to +0.3 V
−0.3 V to AVDD33 + 0.3 V
−1.0 V to AVDD33 + 0.3 V
−0.3 V to DVDD33 + 0.3 V
−0.3 V to DVDD33 + 0.3 V
−0.3 V to CVDD18 + 0.3 V
−0.3 V to DVDD33 + 0.3 V
125°C
−65°C to +150°C

AD9787 Features

`Analog output: adjustable 8.7 mA to 31.7 mA, RL = 25 to 50
`Low power, fine complex NCO allows carrier placement anywhere in DAC bandwidth while adding <300 mW power
`Auxiliary DACs allow I and Q gain matching and offset control
`Includes programmable I and Q phase compensation
`Internal digital upconversion capability
`Multiple chip synchronization interface
`High performance, low noise PLL clock multiplier
`Digital inverse sinc filter
`100-lead, exposed paddle TQFP package

AD9787 Typical Application

·Wireless infrastructure WCDMA, CDMA2000, TD-SCDMA, WiMAX, GSM
·Digital high or low IF synthesis
·Transmit diversity
·Wideband communications LMDS/MMDS, point-to-point

AD9787 Connection Diagram

AD9787  Connection Diagram

AD9787 datasheet

AD9787-EBZ
PDF/DataSheet Download

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