AD9821

The AD9821 is a complete analog signal processor for imaging applications that do not require Correlated Double Sampling (CDS). It features a 40 MHz single-channel architecture designed
to sample and condition the outputs of CMOS imagers and CCD arrays already containing on-chip CDS. The AD9821's signal chain consists of a differential input sample-and-hold amplifier
(SHA), digitally controlled variable gain amplifier (VGA), black level clamp, and a 12-bit ADC.

The internal registers are programmed through a 3-wire serial digital interface. Programmable features include gain adjust- ment, black level adjustment, and power-down modes. The AD9821 operates from a single 3 V power supply, typically dissipates 150 mW, and is packaged in a 48-lead LQFP.