ADD8616A8A General Description
The ADD8616A8A are four-bank Double Data Rate(DDR) Synchronous DRAMs organized as 4,194,304 words x 16 bits x 4 banks, Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Data outputs occur at both rising edges of CK and
/CK. Range of operating frequencies, programmable burst length and programmable latencies allow the same device to be useful for a variety of high
bandwidth high performance memory system applications
ADD8616A8A Maximum Ratings
Voltage on any pin relative to Vss VIN, Vout -0.3 ~ VDDQ+0.3 V
Voltage on VDD supply relative to Vss VDD, VDDQ -0.3 ~ 3.6 V
Storage temperature TSTG -55 ~ +150
Power dissipation PD 1 W
Short circuit current IOUT 50 mA
ADD8616A8A Features
•2.5V for VDDQ power supply
•SSTL_2 interface
•MRS Cycle with address key programs
-CAS Latency (2, 2.5)
-Burst Length (2,4 &8)
-Burst Type (sequential & Interleave)
•4 banks operation
•Differential clock input (CK, /CK) operation
•Double data rate interface
•Auto & Self refresh
•8192 refresh cycle
•DQM for masking
•Package:66-pins 400 mil TSOP-Type II
ADD8616A8A Connection Diagram
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