ADS5270

The ADS5270 is a high-performance, 40MSPS, 8-channel,parallel analog-to-digital converter (ADC). Internal references are provided, simplifying system design requirements. Low power consumption allows for the highest of system integration densities. Serial LVDS (low-voltage differential signaling) outputs reduce the number of interface lines and package size.

An integrated phase lock loop multiplies the incoming ADC sampling  clock by a factor of 12.  This 12x clock is used in the process of serializing the data output from each channel. The 12x clock is also used to generate a 1x and a 6x clock, both of which are transmitted as LVDS clock outputs. The 6x clock is denoted by the differential pair  LCLKP and LCLKN, while the 1x clock is denoted by ADCLKP and ADCLKN. The word output of or LSB first. The bit coinciding with the rising edge of the 1x clock output is the first bit of the word. Data is to be latched by the receiver on both the rising and falling edges of the 6x clock.The ADS5270 provides internal references, or can optionally be driven with external references. Best performance can be achieved through the internal reference mode.

The device is available in  a PowerPAD  TQFP-80 package and is specified over a −40°C to +85°C operating range. each ADC channel can be transmitted either as MSB