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Part Number: ADV3002

 

MFG: ADI

 

D/C: 09

Description: The ADV3002 is a complete HDMI™/DVI link switch featuring equalized transition minimized differe...


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ADV3002 General Description


The ADV3002 is a complete HDMI™/DVI link switch featuring equalized transition minimized differential signaling (TMDS) inputs, ideal for systems with long cable runs. The ADV3002 includes bidirectional buffering for the DDC bus and CEC line, with integrated pull-up resistors for the CEC line. Additionally, the ADV3002 includes an EDID replication function that enables one EDID EEPROM to be shared for all four HDMI ports. The ADV3002 is provided in a space-saving, 80-lead LQFP surface-mount Pb-free plastic package and is specified to operate over the 0 to 85 temperature range.

ADV3002 Maximum Ratings

Parameter Rating
AVCC to AVEE

P5V_x

AMUXVCC

Internal Power Dissipation

TMDS Single-Ended Input Voltage

TMDS Differential Input Voltage

Voltage at TMDS Output

DDC Input Voltage

CEC Input Voltage

I2C Logic Input Voltage (EDID_SCL, EDID_SDA, I2C_SCL, I2C_SDA)

Parallel Input Voltage (I2C_ADDR[1:0], RESETB)

Parallel Input Voltage (SEL[1:0], TX_EN)

Storage Temperature Range

Operating Temperature Range

Junction Temperature

ESD Protection (HBM) on HDMI Input Pins

ESD Protection (HBM) on All Other Pins
3.7 V

5.8 V

AVCC − 0.3 V < AMUXVCC < 5.8 V

1.2 W

AVCC − 1.4 V < VIN < AVCC + 0.3 V

2.0 V

VOUT < 3.7 V

AVEE − 0.3 V < VIN < AMUXVCC + 0.3 V

AVEE − 0.3 V < VIN < 4.0 V

AVEE − 0.3 V < VIN < 4.0 V

AVEE − 0.3 V < VIN < AMUXVCC + 0.3 V

AVEE − 0.3V < VIN < AVCC + 0.3 V

−65 to +125

0 to +85

150

±8 kV

±2.5 kV

ADV3002 Features

4 inputs, 1 output HDMI/DVI links
±8 kV ESD protection on input pins
HDMI 1.3a receive and transmit compliant
      Supports 250 Mbps to 2.25 Gbps data rates and beyond Supports 25 MHz to 225 MHz pixel clocks and beyond Fully buffered nidirectional inputs/outputs
      Switchable 50 on-chip input terminations with manual or automatic control on channel switch Equalized inputs with low added jitter compensate for more than 20 meters of HDMI cable at 2.25 Gbps
     Loss of signal (LOS) detect circuit on TMDS clock
     Output disable feature for reduced power dissipation
Bidirectional DDC buffers (SDA and SCL)
EDID replication reduces component count, while enabling simultaneous access to all HDMI sources
5 V combiner provides power to EDID replicator and CEC
buffer when local system power is off Bidirectional buffered CEC line with integrated pull-up resistors (26 k)
Hot plug detect pulse low on channel switch with
programmable pulse width or direct manual control Standards compatible: HDMI, DVI, HDCP, I2C
80-lead, 14 mm * 14 mm LQFP RoHS-compliant package

ADV3002 Typical Application

Advanced television
(HDTV) sets
Projectors A/V receivers
Set-top boxes

ADV3002 Connection Diagram

ADV3002  Connection Diagram

ADV3002 datasheet

ADV101
PDF/DataSheet Download

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