AK7712A-VT

[ DSP unit ]
  Word length: 24-bit (data RAM)
  Instruction cycle time: 54ns(maximum speed)
  Multiplier: 24 ´ 16 ® 40-bit
  Divider: 16 ¸ 16 ® 16-bit
  Program RAM: 384 ´ 32 bit
  External memory: DRAM,Pseudo-SRAM and SRAM can be connected (only use for delay data).
  Sampling frequency: 32kHz~48kHz
  Automatic clear function of external RAM:
     47msec after bringing RST high at fs=48kHz (include internal data RAM)
  Microcomputer interface:
     synchronized signal type 8-bit serial input 1 channel,
     synchronized signal type 24-bit serial output 1 channel
  Master clock: 512(511)/384(383)/256(255)fs
     The value inside ( ) is maximum calculation steps.
     512fs mode is available when 32kHz sampling is chosen.
  Conversion of master/slave mode for LRCK and BCLK:
     When master mode is selected, the outputs of LRCK and BCLK depend on the set-up for input format.
  Serial input ports(2~4ch), and output ports(2~6ch) : 16/20/24 bit words
[ ADC unit ]
  20-bit 64 ´ Oversampling DS ADC: 2ch
  S/(N+D): 92dB
  DR, S/N: 98dB
[ DAC unit ]
  20-bit 128 ´ Oversampling DS DAC: 4ch
  S/(N+D): 86dB
  DR, S/N: 97dB
  Digital HPF (fc=1Hz)
[ Total ]
  Power supply: +5V
  Package: 100pin LQFP(0.5mm pitch)