AS5C2568

The Austin Semiconductor SRAM family employs high-speed, low power CMOS designs using a four-transistor memory cell.  These SRAMs are fabricated using double-layer metal, double-layer polysilicon technology.

For flexibility in high-speed memory applications, Aus-tin Semiconductor offers chip enable (CE\) and output enable (OE\) capability.  These enhancements can place the outputs in High-Z for additional flexibility in system design.

Writing to these devices is accomplished when write enable (WE\) and CE\ inputs are both LOW.  Reading is accom-plished when WE\ remains HIGH and CE\ and OE\ go LOW.The device offers a reduced power standby mode when dis-abled.  This allows system designs to achieve low standby power requirements.

All devices operate from a single +5V power supply and all inputs and outputs are fully TTL compatible.