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Description: The AS91L1006BU is a one to 6-port JTAG gateway. It partitions a single JT...


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AS91L1006BU General Description


 
The AS91L1006BU is  a one to  6-port  JTAG gateway. It partitions a single JTAG chain  into  six separate chains. These separate  chains  can be optionally configured to operate as a single  chain.
 
The AS91L1006BU device is used to  provide enhanced  capabilities to the standard  IEEE1149.1. It enables the IEEE1149.1 interface  to be used in a true Multi-Drop environment without  any additional signals. This Multi-Drop capability  enables the standard IEEE1149.1 interface to be  used not just for stand alone PCB (Printed Circuit  Board) testing, but also for complete  system  testing including all PCBs within a system back  plane environment.
 
The AS91L1006BU provides the capability  of partitioning the PCB, into multiple smaller  IEEE1149.1 scan chains  totally under software control. Partitioning the IEEE1149.1 chains on the
PCB has several  benefits  which include  easier  fault diagnostics capabilities as a fault on one of  the IEEE1149.1 Local Scan Ports (LSPs) does  not render  the PCB untestable, faster flash
programming on the PCBs, and  removal of  IEEE1149.1 signal loading issues.
 
All of the protocols required for  addressing the AS91L1006BU device via the  Multi-Drop  capability and the protocols for  configuring which of the six IEEE1149.1 LSPs on  the AS91L1006BU are to be used, is handled via rd 3  party ATPG tools from vendors like Asset- Intertech and JTAG Technologies. In a Multi-Drop  environment it is also possible to perform  interconnect tests between multiple PCBs within a  system thus extending the interconnect tests to  the back plane itself.

AS91L1006BU Features

 Device Multi-Drop addressable via the IEEE
 1149.1 protocol
 Support for 6 local scan chains addressable via
 the IEEE 1149.1 interface
 Support for Pass-Through(TM)
 Support for the IEEE 1149.1  USERCODE
 instruction
 Support for Status instruction  enabling non-
 intrusive monitoring of the system card
 Local Scan Port (LSP) enable signal provides the
 ability to use non IEEE 1149.1 compliant devices
 that require JTAG enable signal

 Provides the ability to  initiate Self-Test on a
 remote PCB via a standard IEEE 1149.1
 command
 Support for JTAG Technologies AutoWR(TM)
 feature
 Pinout and feature  set compatible (complete
 second source)  with the Firecron JTS06BU
 device
 Available in a 100-pin LQFP or a 100-pin
 FPBGA lead free package

AS91L1006BU datasheet

AS91L1006BU
PDF/DataSheet Download

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