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MFG:ATMEL  Package Cooled:PLCC  D/C:02  

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Part Number: AT17C512

 

MFG: ATMEL

Package Cooled: PLCC

D/C: 02

Description: The AT17C512/010 and AT17LV512/010 (high-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an eas...


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AT17C512 General Description


The AT17C512/010 and AT17LV512/010 (high-density AT17 Series) FPGA Configuration EEPROMs (Configurators) provide an easy-to-use, cost-effective configuration memory for Field Programmable Gate Arrays. The high-density AT17 Series is packaged in the popular 20-pin PLCC. The high-density AT17 Series family uses a simple serialaccess procedure to configure one or more FPGA devices. The high-density AT17 Series organization supplies enough me-mory to configure one or multiple smaller FPGAs. The user can select the polarity of the reset function by program-ming one EEPROM byte. The devices also support a write protection mode and a system friendly READY pin, which signifies a "good" power level to the device and can be used to ensure reliable system power-up.

The high-density AT17 Series can be programmed with industry-standard programmers, and the Atmel ATDH2200 Programming board.

AT17C512 Maximum Ratings

Operating Temperature............................ -55°C to +125°C

Storage Temperature .............................. -65°C to +150°C

Voltage on Any Pin
with Respect to Ground ...........................-0.1V to VCC +0.5V

Supply Voltage (VCC) ......................................-0.5V to +7.0V

Maximum Soldering Temp. (10 sec. @ 1/16 in.)...........260°C

ESD (RZAP = 1.5K, CZAP = 100 pF)................................ 2000V

AT17C512 Features

• E2 Programmable 524,288 x 1 and 1,048,576 x 1 bit Serial Memories Designed To Store Configuration Programs For Field Programmable Gate Arrays (FPGA)
• Simple Interface to SRAM FPGAs
• Compatible With Atmel AT6000, AT40K FPGAs, Altera EPF8K, EPF10K, EPF6K FPGAs, ORCA FPGAs, Xilinx XC3000, XC4000, XC5200 FPGAs, Motorola MPA1000 FPGAs
• Cascadable To Support Additional Configurations or Future Higher-density Arrays
• Low-power CMOS EEPROM Process
• Programmable Reset Polarity
• Available In PLCC Package (Pin Compatable across Product Family)
• In-System Programmable Via 2-Wire Bus
• Emulation of 24CXX Serial EPROMs
• Available in 3.3V ± 10% LV and 5V Versions
• System Friendly READY Pin

AT17C512 Connection Diagram

AT17C512  Connection Diagram

AT17C512 datasheet

AT17C512
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