AT24C32C-PU

The AT24C32C-PU has thirteen features.(1)low-voltage and standard-voltage operation 1.8 (VCC = 1.8 to 5.5V).(2)internally organized 4096 x 8, 8192 x 8.(3)2-Wire serial interface.(4)schmitt trigger, filtered inputs for noise suppression.(5)bi-directional data transfer protocol.(6)1 MHz (5.0V) and 400 KHz (1.8V compatibility).(7)write protect pin for hardware data protection.(8)32-Byte page write mode (partial page writes allowed).(9)self-timed write cycle (5 ms max).(10)high reliability.(11)lead-free/halogen-free devices.(12)8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3), and 8-ball dBGA2 packages.(13)die sales: wafer form, waffle pack, and bumped wafers.

The AT24C32C-PU provides 32,768/65,536 bits of serial electrically erasable and programmable read only memory (EEPROM) organized as 4096/8192 words of 8 bits each. The device's cascadable feature allows up to 8 devices to share a common 2-wire bus. The device is optimized for use in many industrial and commercial applications where low power and low voltage operation are essential. The AT24C32C-PU is available in space saving 8-lead PDIP, 8-lead JEDEC SOIC, 8-lead Ultra Lead Frame Land Grid Array (ULA), 8-lead TSSOP, 8-lead Ultra Thin Mini-MAP (MLP2x3) and, 8-ball dBGA2 packages and is accessed via a 2-wire serial interface. In addition, the entire family is available in 1.8V (1.8 to 5.5V) version.