Features: • 80C52 Compatible
8051 Pin and Instruction Compatible
Four 8-bit I/O Ports
Three 16-bit Timer/Counters
256 Bytes Scratchpad RAM
• High-speed Architecture
• 40 MHz at 5V, 30 MHz at 3V
• X2 Speed Improvement Capability (6 Clocks/Machine Cycle)
30 MHz at 5V, 20 MHz at 3V (Equivalent to 60 MHz at 5V, 40 MHz at 3V)
• Dual Data Pointer
• On-chip ROM/EPROM (8Kbytes)
• Programmable Clock Out and Up/Down Timer/Counter 2
• Asynchronous Port Reset
• Interrupt Structure with
6 Interrupt Sources
4 Level Priority Interrupt System
• Full Duplex Enhanced UART
Framing Error Detection
Automatic Address Recognition
• Low EMI (Inhibit ALE)
• Power Control Modes
Idle Mode
Power-down Mode
Power-off Flag
• Once Mode (On-chip Emulation)
• Power Supply: 4.5 - 5.5V, 2.7 - 5.5V
• Temperature Ranges: Commercial (0 to 70oC) and Industrial (-40 to 85oC)
• Packages: PDIL40, PLCC44, VQFP44 1.4, PQFP44 (13.9 footprint)SpecificationsAmbiant Temperature Under Bias:
C = commercial...................................................0°C to 70°C
I = industrial ...................................................-40°C to 85°C
Storage Temperature ............................... -65°C to + 150°C
Voltage on VCC to VSS .......................................-0.5V to + 7 V
Voltage on VPP to VSS .....................................-0.5V to + 13 V
Voltage on Any Pin to VSS..........................-0.5V to VCC + 0.5V
Power Dissipation ........................................................... 1 W(2)
Notes: 1. Stresses at or above those listed under " Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions may affect device reliability.
2. This value is based on the maximum allowable die temperature and the thermal resistance of the package.
DescriptionTS80C52X2 is high performance CMOS ROM, OTP, EPROM and ROMless versions of the 80C51 CMOS single chip 8-bit microcontroller.
The TS80C52X2 retains all features of the 80C51 with extended ROM/EPROM capacity (8 Kbytes), 256 bytes of internal RAM, a 6-source, 4-level interrupt system,an on-chip oscilator and three timer/counters.
In addition, the TS80C52X2 has a dual data pointer, a more versatile serial channel that facilitates multiprocessor communication (EUART) and an X2 speed improvement mechanism.
The fully static design of the TS80C52X2 allows to reduce system power consumption by bringing the clock frequency down to any value, even DC, without loss of data.
The TS80C52X2 has 2 software-selectable modes of reduced activity for further reduction in power consumption. In the idle mode the CPU is frozen while the timers,the serial port and the interrupt system are still operating. In the power-down mode the RAM is saved and all other functions are inoperative.
AT80C32X2 Data Sheet
