Features: * Operates Between 2.7V to 5.5V
* High Density, High-Performance Electrically Erasable Complex Programmable Logic Device
44-Pin, 32 I/O CPLD
12 ns Maximum Pin-to-Pin Delay
Registered Operation Up To 90.9 MHz
Fully Connected Input and Feedback Logic Array
* Flexible Logic Macrocell
D/T/Latch Configurable Flip Flops
Global and Individual Register Control Signals
Global and Individual Output Enable
Programmable Output Slew Rate
* Advanced Power Management Features
Automatic 3 mA Stand-By (ATF1500ABVL)
Pin-Controlled 5 A Stand-By Mode (Typical)
Programmable Pin-Keeper Inputs and I/Os
* Available in Commercial and Industrial Temperature Ranges
* Available in 44-Pin PLCC and TQFP Packages
* Advanced Flash Technology
100% Tested
Completely Reprogrammable
100 Program/Erase Cycles
20 Year Data Retention
2000V ESD Protection
200 mA Latch-Up Immunity
* Supported By Popular 3rd Party Tools
* Security Fuse FeaturePinout
SpecificationsTemperature Under Bias...............................-55°C to +125°C
Storage Temperature.................................. -65°C to +150°C
Voltage on Any Pin with
Respect to Ground .......................................-2.0V to +5.25V
Voltage on Input Pins
with Respect to Ground
During Programming.....................................-2.0V to +14.0V
Programming Voltage with
Respect to Ground .......................................-2.0V to +14.0VDescriptionThe ATF1500ABVL is a high performance, high density Complex PLD. Built on an advanced Flash technology, it has maximum pin to pin delays of 12 ns and supports sequential logic operation at speeds up to 90.9 MHz. With 32 logic macrocells and up to 36 inputs, it easily integrates logic from several TTL, SSI, MSI and classic PLDs.
The ATF1500ABVL's global input and feedback architecture simplifies logic placement and eliminates pinout changes due to design changes.The ATF1500ABVL has 32 bi-directional I/O pins and 4 dedicated input pins. Each dedicated input pin can also serve as a global control signal: register clock, register reset or output enable. Each of these control signals can be selected for use individually within each macrocell.
Each of the 32 logic macrocells generates a buried feed back, which goes to the global bus. Each input and I/O pin also feeds into the global bus. Because of this global bussing, each of these signals is always available to all 32 macrocells in the device ATF1500ABVL. Each macrocell also generates a foldback logic term, which goes to a regional bus. All signals within a regional bus are connected to all 16 macrocells within the region.Cascade logic between macrocells in the ATF1500ABVL allows fast, efficient generation of complex logic functions.
The ATF1500ABVL contains 4 such logic chains, each capable of creating sum term logic with a fan in of up to 40
product terms.
ATF1500ABVL Data Sheet
