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Part Number: ATLV7

 

 

 

 

Description: The ATLV Series CMOS gate arrays employ 1.0 µ-drawn, double-level metal,Si-gate, CMOS technology...


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ATLV7 General Description


The ATLV Series CMOS gate arrays employ 1.0 µ-drawn, double-level metal,Si-gate, CMOS technology processed in Atmel's U.S.-based, advanced manufacturing facility.  The arrays utilize an enhanced channelless architecture which results in greater than 50 percent usable gates.

Atmel's flexible design system uses industry design standards and is compatible with popular CAD/CAE software and hardware packages.  The customer can
start designing with the ATLV series today using existing CAD/CAE tools.

ATLV7 Maximum Ratings

Operating Temperature ....................... -40°C to +85°C
Storage Temperature ........................ -65°C to +150°C
Voltage on Any Pin
with Respect to Ground ...................   -2.0 V to +5.5 V1
Maximum Operating Voltage ...............................  5.5 V

ATLV7 Features

• Specifically Designed  for Battery Powered  Applications 1.0 - 3.0 Volts and will Operate from 0.7 to 5.5 Volts
• Static Current Drain of <75 nA at 1.0 Volts
• 200 MHz Maximum Toggle Frequency for Flip Flop at 1.5 Volts
• 1.0 µ Drawn Gate Length CMOS Gate Arrays
• All Package Styles Offered Including TQFP and TAB
• Improved Product Testability Using Serial Scan, Boundary Scan,and JTAG
• Second Source Existing ASIC Design in Atmel's ATLV via Design Translation.  Improved Performance and Lower Cost

ATLV7 datasheet

ATLV7
PDF/DataSheet Download

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