ATMEGA8A-PU

The ATMEGA8A-PU is one member of the ATMEGA8A series.The ATmega8A is a low-power CMOS 8-bit microcontroller based on the AVR RISC architecture. By executing powerful instructions in a single clock cycle, the ATmega8A achieves throughputs approaching 1 MIPS per MHz, allowing the system designer to optimize power consumption versus processing speed.

Features of the ATMEGA8A-PU are:(1)130 powerful instructions most single-clock cycle execution; (2)32 x 8 general purpose working registers; (3)fully static operation; (4)up to 16 MIPS Throughput at 16 MHz; (5)on-chip 2-cycle multiplier; (6)two 8-bit timer/counters with separate prescaler, one compare mode; (7)one 16-bit timer/counter with separate prescaler, compare mode, and capture mode; (8)real time counter with separate oscillator; (9)three PWM channels; (10)power-on reset and programmable brown-out detection; (11)internal calibrated RC oscillator; (12)external and internal interrupt sources.

The absolute maximum ratings of the ATMEGA8A-PU can be summarized as:(1)voltage on any pin except RESET with respect to ground:-0.5 to Vcc+0.5V;(2)storage temperature:-65 to 150;(3)operating temperature:-55 to 125;(4)voltage on RESET with respect to ground:-0.5 to 13.0V;(5)DC current per I/O pin:40mA;(6)maximum operating voltage:6.0V;(7)DC current Vcc and GND pins:300mA.Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or other conditions beyond those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.The ATmega8A contains 8K bytes On-chip In-System Reprogrammable Flash memory for program storage. Since all AVR instructions are 16- or 32-bits wide, the Flash is organized as 4K x 16 bits. For software security, the Flash Program memory space is divided into two sections,Boot Program section and Application Program section.Note that the Status Register is not automatically stored when entering an interrupt routine, nor restored when returning from an interrupt routine. This must be handled by software.