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Part Number: AU5780A
Description: The AU5780A is a line transceiver being primarily intended for in-vehicle multiplex applications. It p...
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AU5780A
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DataSheet
General Description
AU5780A General Description
The AU5780A is a line transceiver being primarily intended for in-vehicle multiplex applications. It provides interfacing between a link controller and the physical bus wire. The device supports the SAE/J1850 VPWM standard with a nominal bus speed of 10.4 kbps.
AU5780A Maximum Ratings
| SYMBOL |
PARAMETER |
CONDITIONS |
MIN. |
MAX. |
UNIT |
| VBATT | supply voltage |
20 |
+24 |
V | |
| VBATT.ld | short-term supply voltage | load dump; t < 1s |
+50 |
V | |
| VBATT.tr1 | transient supply voltage | SAE J1113 pulse 1 |
100 |
V | |
| VBATT.tr2 | transient supply voltage | SAE J1113 pulses 2 |
+150 |
V | |
| VBATT.tr3 | transient supply voltage | SAE J1113 pulses 3A, 3B |
200 |
+200 |
V |
| VB | Bus voltage | Rf > 10 kΩ ; Rb >10Ω 1 |
20 |
+20 |
V |
| VB.tr1 | transient bus voltage | SAE J1113 pulse 1 |
50 |
V | |
| VB.tr2 | transient bus voltage | SAE J1113 pulses 2 |
+100 |
V | |
| VB.tr3 | transient bus voltage | SAE J1113 pulses 3A, 3B |
200 |
+200 |
V |
| VI | DC voltage on pins TX, R/F, RX, /LB |
0.3 |
7 |
V | |
| ESDBATT | ESD capability of BATT pin | Air gap discharge, R=2kΩ, C=150pF |
9 |
+9 |
kV |
| ESDbus | ESD capability of BUS_OUT and BUS_IN pins | Air gap discharge, R=2kΩ, C=150pF, Rf > 10 k |
9 |
+9 |
kV |
| ESDlogic | ESD capability of TX, RX, R/F, and /LB pins | Human Body, R=1.5kΩ, C=100pF |
2 |
+2 |
kV |
| Ptot | maximum power dissipation | at Tamb = +125 °C |
164 |
mW | |
| JA | thermal impedance |
152 |
°C/W | ||
| Tamb | operating ambient temperature |
40 |
+125 |
°C | |
| Tstg | storage temperature |
40 |
+150 |
°C | |
| Tvj | junction temperature |
40 |
+150 |
°C | |
| TLEAD | Lead temperature | Soldering, 10 seconds maximum |
265 |
°C | |
| ICL(BUS) | Bus output clamp current | No latch-up, |VBUS| = 25 V |
100 |
mA | |
| ICL(BATT) | Battery clamp current | No latch-up or snap back, |VBATT| = 25 V |
100 |
mA |
AU5780A Features
• Supports SAE/J1850 VPW standard for in-vehicle class B multiplexing
• Bus speed 10.4 kbps nominal
• Drive capability 32 bus nodes
• Low RFI due to output waveshaping with adjustable slew rate
• Direct battery operation with protection against +50V load dump,jump start and reverse battery
• Bus terminals proof against automotive transients up to
200V/+200V
• Thermal overload protection
• Very low bus idle power consumption
• Diagnostic loop-back mode
• 4X mode (41.6 kbps) reception capability
• ESD protected to 9 KV on bus and battery pins
• 8-pin SOIC
• Bus speed 10.4 kbps nominal
• Drive capability 32 bus nodes
• Low RFI due to output waveshaping with adjustable slew rate
• Direct battery operation with protection against +50V load dump,jump start and reverse battery
• Bus terminals proof against automotive transients up to
200V/+200V
• Thermal overload protection
• Very low bus idle power consumption
• Diagnostic loop-back mode
• 4X mode (41.6 kbps) reception capability
• ESD protected to 9 KV on bus and battery pins
• 8-pin SOIC
AU5780A Connection Diagram
AU5780A
PDF/DataSheet Download
- Datasheet: AU5780A
- File Size: 84047 KB
- Manufacturer: PHILIPS [Philips Semiconductors]
- Click here to Download
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