BCM4500

Features:

All-digital satellite receiver
* 256-kilobaud to 30-megabaud variable rate receiver
* Supports BPSK, QPSK, 8PSK, & 16QAM modulation
* Dual integrated 7-bit A/D converters
* Digital square-root Nyquist filters (= 0.2, 0.35)
* All-digital clock and carrier recovery
*12-tap adaptive equalizer
Advanced modulation turbo FEC decoder
* High performance decoder approaches constrained capacity theoretical limits
* Supports QPSK rates 1/4, 1/2 and 3/4
* 8PSK flexible code rate support including 2/3, 3/4, 5/6 and 8/9
* Supports 16QAM rate 3/4
* No external RAM support required
* Reed-Solomon decoder; t=10
* Complies with DVB/DIRECTV^@ /Digicipher II^TMFEC decoder
MPEG-2 or DIRECTV output interface with output clock PLL
On-chip microcontroller for acquisition and tracking
On-chip BERT for BER testing
Integrated DiSEqC^TM(v2.0) transmitter and receiver
128-pin PQFP
3.3V I/O and analog operation
1.8V digital operation




Description

The BCM4500 is a single chip digital satellite receiver supporting QPSK, 8PSK and 16QAM modulations with iteratively (turbo) decoded error correction coding. It represents an industry milestone in terms of satellite system throughput and operating points. The BCM4500 also receives DVB, DIRECTV and Digichiper II (DCII) QPSK signals to support legacy system operation.

The BCM4500 contains dual 7-bit A/D converters, an all-digital variable rate BPSK / QPSK / 8PSK / 16QAM receiver, an advanced modulation turbo FEC decoder, and a DVB / DIRECTV / DCII compliant FEC decoder. All required RAM is integrated and all required clocks are generated on chip from a single reference crystal. Baseband I/Q analog waveforms are sampled by the integrated 7-bit A/D converters, resampled by integrated interpolative digital filter banks, and filtered by dual square-root Nyquist filters. Optimized soft decisions are then fed into either a DVB / DIRECTV / DCII compliant FEC decoder, or an advanced modulation turbo decoder. The final error-corrected output of BCM4500 is delivered in MPEG-2 or DIRECTV transport format. The output clock is generated by an on-chip PLL for low jitter operation and glueless integration with Broadcom's BCM7020 HD graphics and video subsystem.The BCM4500 contains a microcontroller which implements a high level language interface for easy host software development. It also contains an integrated DiSEqCTM controller for two way communication with LNB.