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CD4021BC

Features: Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 VDD (typ.) Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS 5V10V15V parametric ratingsSymmetrical output characteristics Maximum input leakage 1 A at 15V over full temperature rangeSpecificationsSupp...

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SeekIC No. : 004311232 Detail

CD4021BC: Features: Wide supply voltage range: 3.0V to 15V High noise immunity: 0.45 VDD (typ.) Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS 5V10V15V parametric ratingsSymmetrical o...

CD4021BC Data Sheet

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Part Number:
CD4021BC
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/4/29

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Product Details

Description



Features:

Wide supply voltage range: 3.0V to 15V
High noise immunity: 0.45 VDD (typ.)
Low power TTL compatibility: Fan out of 2 driving 74L or 1 driving 74LS
5V10V15V parametric ratings
Symmetrical output characteristics
Maximum input leakage 1 A at 15V over full temperature range


Specifications

Supply Voltage (VDD)................................. -0.5V to +18V
Input Voltage (VIN)............................ -0.5V to VDD +0.5V
Storage Temperature Range (TS).......... -65°C to +150°C
Power Dissipation (PD) Dual-In-Line ...................700 mW
Small Outline....................................................... 500 mW
Lead Temperature (TL) (Soldering, 10 seconds) ....260°C




Description

The CD4021BC is an 8-stage parallel input/serial output shift register. A parallel/serial control input enables individual JAM inputs to each of 8 stages. Q outputs are available from the sixth, seventh, and eighth stages. All outputs have equal source and sink current capabilities and conform to standard "B" series output drive.

When the parallel/serial control input is in the logical "0" state, data is serially shifted into the register synchronously with the positive transition of the clock. When the parallel/ serial control is in the logical "1" state, data is jammed into each stage of the register asynchronously with the clock. All CD4021BC inputs are protected against static discharge with diodes to VDD and VSS.




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