Features: Wide supply voltage range 3.0V to 18V
High noise immunity 0.45 VDD (typ.)
Low power TTL Fan out of 2 driving 74L
compatibility or 1 driving 74LS
RCA CD4034B second source
ApplicationParallel Input/Parallel Output Parallel Input/Serial Output
Serial Input/Parallel Output Serial Input/Serial Output register
Shift right/shift left register
Shift right/shift left with parallel loading
Address register
Buffer register
Bus system register with enable parallel lines at bus side
Double bus register system
Up-down Johnson or ring counter
Pseudo-random code generators
Sample and hold register (storage, counting, display)
Frequency and phase comparatorSpecificationsIf Military/Aerospace specified devices are required, please contact the National Semiconductor Sales Office/Distributors for availability and specifications.
DC Supply Voltage (VDD) -0.5 VDC to a18 VDC
Input Voltage (VIN) -0.5 VDC to VDD a 0.5 VDC
Storage Temp. Range (TS) -65 to 150
Power Dissipation (PD)
Dual-In-Line 700 mW
Small Outline 500 mW
Lead Temperature (TL)
(Soldering, 10 seconds) 260
DescriptionThe CD4034BM/CD4034BC is an 8-bit CMOS static shift register with two parallel bidirectional data ports (A and B) which, when combined with serial shifting operations, can be used to (1) bidirectionally transfer parallel data between two buses, (2) convert serial data to parallel form and direct them to either of two buses, (3) store (recirculate) parallel data, or (4) accept parallel data from either of two buses and convert them to serial form. These operations are controlled by five control inputs:
A ENABLE (AE): ``A'' data port is enabled only when AE is at logical ``1''. CD4034BC allows the use of a common bus for multiple packages.
A-BUS-TO-B-BUS/B-BUS-TO-A-BUS (A/B): CD4034BC input controls the direction of data flow. When at logical `'1'', data flows from port A to B (A is input, B is output). When at logical ``0'', the data flow direction is reversed.
ASYNCHRONOUS/SYNCHRONOUS (A/S): When A/S is at logical ``0'', data transfer occurs at positive transition of the CLOCK. When A/S is at logical ``1'', data transfer is independent of the CLOCK for parallel operation. In CD4034BCserial mode, A/S input is internally disabled such that operation is always synchronous. (Asynchronous serial operation is not possible.)
PARALLEL/SERIAL (P/S): A logical ``1'' P/S input allows data transfer into the registers via A or B port (synchronous if A/S e logical ``0'', asynchronous if A/S e logical ``1''). A logical ``0'' P/S allows CD4034BC serial data to transfer into the register synchronously with the positive transition of the CLOCK, independent of the A/S input.
CD4034BC CLOCK: Single phase, enabled only in synchronous mode. (Either P/S e logical ``1'' and A/S e logical ``0'' or P/S e logical ``0''.
CD4034BC Data Sheet
