MFG:MOT Package Cooled:85+ D/C:DIP
MFG: MOT
Package Cooled: 85+
D/C: DIP
Description: The'HC20and'HCT20 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar...
The'HC20and'HCT20 logic gates utilize silicon gate CMOS technology to achieve operating speeds similar to LSTTL gates with the low power consumption of standard CMOS integrated circuits.All devices have the ability to drive 10 LSTTL loads.The HCT logic family is functionally pin compatible with the standard LS logic family.
DC Supply Voltage, VCC. . . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 7V
DC Input Diode Current, IIK
For VI < -0.5V or VI > VCC + 0.5V. . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK
For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . ±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . . ±25mA
DC VCCor Ground Current, ICC orIGND. . . . . . . . . . . . . . . . . .±50mA
CD54HC20F3A
PDF/DataSheet Download
CD54HC195 is useful in a wide variety of shifting, counting and storage applications. CD54HC195 performs serial, parallel, serial to parallel, or parallel to serial data transfers at very high speeds.The two CD54HC195 of operation, shift right (Q0-Q1) and pa...
The 'HC194 and CD74HCT194 are 4-bit shift registers with Asynchronous Master Reset (MR). In the parallel mode (S0 and S1 are high), data is loaded into the associated flip-flop and appears at the output after the positive transition of the clock input (CP)....
The 'HC192, 'HC193 and 'HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous counters, respectively.Presetting the counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel load input (P...
The 'HC192, 'HC193 and 'HCT193 are asynchronously presettable BCD Decade and Binary Up/Down synchronous counters, respectively.Presetting the CD54HC192 counter to the number on the preset data inputs (P0-P3) is accomplished by a LOW asynchronous parallel loa...
The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters.Presetting the counter to the number on preset data inputs (A−D) is accomplished by a low asy...
The CD54/74HC190 are asynchronously presettable BCD decade counters, whereas the CD54/74HC191 and CD54/74HCT191 are asynchronously presettable binary counters.Presetting the CD54/74HC190 counter to the number on preset data inputs (A−D) is accomplished...
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