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Part Number: CD54HC597

 

 

 

 

Description: The 'HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin-compatible with the LS...


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CD54HC597 General Description


The 'HC597 and CD74HCT597 are high-speed silicon gate CMOS devices that are pin-compatible with the LSTTL 597 devices. Each device consists of an 8-flip-flop input register and an 8-bit parallel-in/serial-in, serial-out shift register. Each register is controlled by its own clock. A "low" on the parallel load input (PL) shifts parallel stored data asynchronously into the shift register. A "low" master input (MR) clears the shift register. Serial input data can also be synchronously shifted through the shift register when PL is high.

CD54HC597 Maximum Ratings

DC Supply Voltage, VCC .................................................................. -0.5V to 7V
DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V ..............±20mA
DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V .........±20mA
DC Output Source or Sink Current per Output Pin, IO
For VO > -0.5V or VO < VCC + 0.5V ............................................................25mA
DC VCC or Ground Current, ICC or IGND ..................................................±50mA

CD54HC597 Features

• Buffered Inputs
• Asynchronous Parallel Load
• Fanout (Over Temperature Range)
    Standard Outputs . . . . . . . . . . . . . . . 10 LSTTL Loads
    Bus Driver Outputs . . . . . . . . . . . . . 15 LSTTL Loads
• Wide Operating Temperature Range . . . -55to 125
• Balanced Propagation Delay and Transition Times
• Significant Power Reduction Compared to LSTTL Logic ICs
• HC Types
     2V to 6V Operation
     High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V
• HCT Types
     4.5V to 5.5V Operation
     Direct LSTTL Input Logic Compatibility, VIL= 0.8V (Max), VIH = 2V (Min)
     CMOS Input Compatibility, Il 1A at VOL, VOH

CD54HC597 Connection Diagram

CD54HC597  Connection Diagram

CD54HC597 datasheet

CD54HC597F3A
PDF/DataSheet Download

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