CD74ACT139

Features: • Buffered Inputs• Typical Propagation Delay - 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015• SCR-Latchup-Resistant CMOS Process and Circuit Design• Speed of Bipolar FAST™/AS/S with Significantly Reduced P...

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CD74ACT139 Picture
SeekIC No. : 004311902 Detail

CD74ACT139: Features: • Buffered Inputs• Typical Propagation Delay - 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015• SCR-Latchup-Resistant C...

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Part Number:
CD74ACT139
Supply Ability:
5000

Price Break

  • Qty
  • 1~5000
  • Unit Price
  • Negotiable
  • Processing time
  • 15 Days
Total Cost: $ 0.00

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Upload time: 2024/3/28

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Product Details

Description



Features:

• Buffered Inputs
• Typical Propagation Delay - 5.4ns at VCC = 5V, TA = 25oC, CL = 50pF
• Exceeds 2kV ESD Protection MIL-STD-883, Method 3015
• SCR-Latchup-Resistant CMOS Process and Circuit Design
• Speed of Bipolar FAST™/AS/S with Significantly Reduced Power Consumption
• Balanced Propagation Delays
• AC Types Feature 1.5V to 5.5V Operation and Balanced Noise Immunity at 30% of the Supply
• ±24mA Output Drive Current - Fanout to 15 FAST™ ICs - Drives 50W Transmission Lines



Pinout

  Connection Diagram


Specifications

DC Supply Voltage, VCC . . . . . . . . . . . . . . . . . . . . . . . . -0.5V to 6V
DC Input Diode Current, IIK For VI < -0.5V or VI > VCC + 0.5V . . . . . . . . . . . . . . . . . . . . . .±20mA
DC Output Diode Current, IOK For VO < -0.5V or VO > VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
DC Output Source or Sink Current per Output Pin, IO For VO > -0.5V or VO < VCC + 0.5V . . . . . . . . . . . . . . . . . . . .±50mA
DC VCC or Ground Current, ICC or IGND (Note 3) . . . . . . . . .±100mA



Description

The CD74AC139 and CD74ACT139 are dual 2-to-4-line decoders/demultiplexers that utilize the Harris Advanced CMOS Logic technology. CD74ACT139 contain two independent binary to one-of-four decoders, each with a single active LOW enable input (1E or 2E). Data on the select inputs (1A0 and 1A1 or 2A0 and 2A1) cause one of the four normally HIGH outputs to go LOW.
If the enable input is HIGH, all four outputs remain HIGH. For CD74ACT139 demultiplexer operation, the enable input is the data input.
The enable input also functions as a chip select when these devices are cascaded.




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