Features: BiCMOS Technology With Low Quiescent PowerBuffered InputsDirect Clear Input48-mA Output Sink CurrentOutput Voltage Swing Limited to 3.7 VControlled Output Edge RatesInput/Output Isolation From VCCSCR Latch-Up-Resistant BiCMOS Process and Circuit DesignApplications Include: Buffer/Storag...
CD74FCT273: Features: BiCMOS Technology With Low Quiescent PowerBuffered InputsDirect Clear Input48-mA Output Sink CurrentOutput Voltage Swing Limited to 3.7 VControlled Output Edge RatesInput/Output Isolation ...
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The CD74FCT273 is a positive-edge-triggered, D-type flip-flop with a direct clear (CLR) input. CD74FCT273 uses a small-geometry BiCMOS technology. The CD74FCT273 output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The CD74FCT273 output configuration also enhances switching speed and is capable of sinking 48 mA.
CD74FCT273 Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock (CLK) pulse. CD74FCT273 Clock triggering occurs at a particular voltage level and is not directly related to the transition time of the positive-going pulse. When CLK is at either the high or low level, the D input has no effect at the output. All eight flip-flops are controlled by a common clock (CLK) and a common reset (CLR). The outputs are placed in a low state when CLR is taken low, independent of the CLK.
The CD74FCT273 is characterized for operation from 0°C to 70°C.