CD74FCT2952A

The CD74FCT2952A is an octal transceiver and register, consisting of two 8-bit, back-to-back registers that store data flowing in both directions between two bidirectional buses. It uses a small-geometry BiCMOS technology. Data on the A or B bus is stored in the registers on the low-to-high transition of the clock (CLKAB or CLKBA) input if the clock-enable (CLKENAB or CLKENBA) input is low. Taking the output-enable (OEAB or OEBA) input low accesses the data on either port.

CD74FCT2952A contains two 8-bit, back-to-back registers that store data flowing in both directions between two bidirectional buses. Each register has separate clock, clock enable, and 3-state output enable signals associated with it.

The CD74FCT2952A output stage is a combination of bipolar and CMOS transistors that limits the output high level to two diode drops below V_CC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes V_CC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 64 mA.

To ensure the high-impedance state during power up or power down, OE should be tied to V_CC through a pullup resistor; the CD74FCT2952A minimum value of the resistor is determined by the current-sinking capability of the driver.

The CD74FCT2952A is characterized for operation from 0°C to 70°C.