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CD74FCT841A

Features: BiCMOS Technology With Low Quiescent PowerBuffered InputsNoninverted OutputsInput/Output Isolation From VCCControlled Output Edge Rates48-mA Output Sink CurrentOutput Voltage Swing Limited to 3.7 V at VCC = 5 VSCR Latch-Up-Resistant BiCMOS Process and Circuit DesignPackage Options Includ...

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SeekIC No. : 004311950 Detail

CD74FCT841A: Features: BiCMOS Technology With Low Quiescent PowerBuffered InputsNoninverted OutputsInput/Output Isolation From VCCControlled Output Edge Rates48-mA Output Sink CurrentOutput Voltage Swing Limited...

CD74FCT841A Data Sheet

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Part Number:
CD74FCT841A
Supply Ability:
5000

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  • 1~5000
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  • 15 Days
Total Cost: $ 0.00

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Product Details

Description



Features:

 BiCMOS Technology With Low Quiescent Power
 Buffered Inputs
 Noninverted Outputs
 Input/Output Isolation From VCC
 Controlled Output Edge Rates
 48-mA Output Sink Current
 Output Voltage Swing Limited to 3.7 V at VCC = 5 V
 SCR Latch-Up-Resistant BiCMOS Process and Circuit Design
 Package Options Include Plastic Small-Outline (M) Package and Standard Plastic (EN) DIP


Pinout

Connection Diagram


Specifications

DC supply voltage range, VCC  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .0.5 V to 6 V
DC input clamp current, IIK (VI < 0.5 V)  . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20 mA
DC output clamp current, IOK (VO < 0.5 V)  . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . .50 mA
DC output sink current per output pin, IOL . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .. . .70 mA
DC output source current per output pin, IOH  . . . . . . . . . . . . . .. . . . . . . . . . . . . .. . .30 mA
Continuous current through VCC, (ICC)  . . . . . .. . . . . . . . . . . . . . . . . . . . . . . . . . . . .  260 mA
Continuous current through GND  . . . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . . . . . . . .. .500 mA
Package thermal impedance, JA (see Note 1)  EN package  . .. . . . . . . . . . . . . . . . . .67°C/W
                                                                          M package . . . . . . . . . . . . . . . . . . . . 46°C/W
Storage temperature range, Tstg  . . . . . . . . . . . . . . . . .. . . . . . . . . . . . . .. . . 65°C to 150°C 


Description

The CD74FCT841A is a 10-bit, D-type latch with 3-state outputs, designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers. The device provides extra data width for wider address/data paths or buses carrying parity. The latches are transparent D-type latches.

CD74FCT841A provides noninverted outputs. transistors that limits the output high level to two diode drops below VCC. This resultant lowering of output swing (0 V to 3.7 V) reduces power-bus ringing [a source of electromagnetic interference (EMI)] and minimizes VCC bounce and ground bounce and their effects during simultaneous output switching. The output configuration also enhances switching speed and is capable of sinking 48 mA.

The CD74FCT841A outputs are transparent to the inputs when the latch enable (LE) is high. When LE goes low, the data is latched. The output-enable (OE) input controls the 3-state outputs. When OE is high, the outputs are in the high-impedance state. The latch operation is independent of the state of OE.

OE does not affect the internal operations of the latch. Previously stored data can be retained or new data can be entered while the outputs are in the high-impedance state.

The CD74FCT841A is characterized for operation from 0°C to 70°C.




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