CD74HC4020M96

The CD74HC4020M96 is designed as one kind of high-speed CMOS logic 14 stage binary counter and each stage is master-slave flipflop. The state of the stage advances one count on the negative clock transition of each input pulse; a high voltage level on the MR line resets all counters to their zero state. All inputs and outputs are buffered.

Features of the CD74HC4020M96 are:(1)Fully Static Operation;(2)Buffered Inputs;(3)fanout (over temperature range) standard outputs: 10 LSTTL loads and bus driver outputs: 15 LSTTL loads;(4)wide operating temperature range: -55 to +125 ;(5)balanced propagation delay and transition times;(6)significant power reduction compared to LSTTL logic ICs;(7)alternate source is philips/signetics;(8)High Noise Immunity: NIL = 30%, NIH = 30% of VCC at VCC = 5V.

The absolute maximum ratings of the CD74HC4020M96 can be summarized as:(1)DC supply voltage: -0.5V to 7V;(2)DC input diode current for VI < -0.5V or VI > VCC + 0.5V: ±20 mA;(3)DC output diode current for VO < -0.5V or VO > VCC + 0.5V: ±20 mA;(4)DC output source or sink current per output pin for VO > -0.5V or VO < VCC + 0.5V: ±25 mA;(5)DC Vcc or ground current, Icc or IGND: ±50 mA. If you want to know more information such as the electrical characteristics about the CD74HC4020M96, please download the datasheet in www.seekic.com or www.chinaicmart.com .