CN8471A

Features:

• 256-, 128-, 64-, or 32-channel HDLC
controller
• OSI Layer 2 protocol support
• General purpose HDLC (ISO 3309)
X.25 (LAPB)
Frame relay (LAPF/ANSI T1.618)
ISDN D-channel (LAPD/Q.921)
SS7 support
• 8, 4, 2, or 1 independent serial interfaces
which support
T1/E1 data streams
DC to 8.192 Mbps TDM busses
• Configurable logical channels
Standard DS0 (56, 64 kbps)
Hyperchannel (Nx64)
Subchannel (Nx8)
• Per-channel protocol mode selection
16-bit FCS mode
32-bit FCS mode
SS7 mode (16-bit FCS)
Transparent mode (unformatted data)
• Per-channel DMA buffer management
Linked list data structures
Variable size transmit/receive FIFO
• Per-channel message length check
Select no length checking
Select from two 12-bit registers to
compare message length
Maximum length 16,384 Bytes
• Direct PCI bus interface
32-bit, 66 or 33 MHz operation
Bus master and slave operation
PCI Version 2.1
• Local Expansion Bus interface (EBUS)
32-bit multiplexed address/data bus
Burst access up to 64 Bytes
• Low power, 3.3/2.5 V CMOS operation
• JTAG boundary scan access port
• 208-pin PQFP/surface-mount package
• BGA


Application

• ISDN basic-rate or primary-rate interfaces
• ISDN D-channel controller
• Routers
• Cellular base station switch controller
• CSU/DSU
• Protocol converter
• Packet data switch
• Frame relay switches/Frame Relay Access Devices (FRAD)
• DXI network interface
• Distributed packet-based communications system
• Access multiplexer/concentrator


Specifications




Description

The CN8478, CN8474A, CN8472A, and CN8471A are advanced Multichannel Synchronous Communication Controllers (MUSYCCs) that format and deformat up to 256 (CN8478), 128 (CN8474A), 64 (CN8472A), or 32 (CN8471A) HDLC
channels in a single CMOS integrated circuit. MUSYCC operates at Layer 2 of the Open Systems Interconnection (OSI) protocol reference model. MUSYCC CN8471A provides a comprehensive, high-density solution for processing HDLC channels for
internetworking applications such as Frame Relay, ISDN D-channel signaling, X.25, Signaling System 7 (SS7), DXI, ISUP, and LAN/WAN data transport. Under minimal host supervision, MUSYCC manages a linked list of channel data buffers
in host memory by performing Direct Memory Access (DMA) of the HDLC channels.
MUSYCC interfaces CN8471A with eight independent serial data streams, such as T1/E1 signals, and then transfers data across the popular 32-bit Peripheral Component Interface (PCI) CN8471A bus to system memory at a rate of up to 66 MHz. Each serial
interface can be operated at up to 8.192 MHz. Logical channels can be mapped as any combination of DS0 time slots to support ISDN hyperchannels (Nx64 kbps) or as any number of bits in a DS0 for subchanneling applications (Nx8 kbps).
MUSYCC CN8471A also includes a 32-bit expansion port for bridging the PCI bus to local microprocessors or peripherals. A JTAG port enables boundary-scan testing to replace bed-of-nails board testing.
Device drivers for Linux, VxWorks®, and pSOS™ operating systems are available under a no-fee license agreement from Conexant. CN8471A drivers include C source code and supporting software documents.