CY2037

Features:

• EPROM-programmable die for in-package programming of crystal oscillators
• High resolution PLL with 12 bit multiplier and 10 bit divider
• EPROM-programmable capacitor tuning array
• Twice programmable die
• Simple 4-wire programming interface
• On-chip oscillator runs from 1030 MHz crystal
• EPROM-selectable TTL or CMOS duty cycle levels
• Operating frequency
-1200 MHz at 5V
-1100 MHz at 3.3V
-166.67 MHz at 2.7V
• Sixteen selectable post-divide options, using either PLL or reference oscillator output
• Programmable PWR_DWN or OE pin
• Programmable asynchronous or synchronous OE and PWR_DWN modes
• Low Jitter outputs
-< ±100ps (pk-pk) at 5V
-< ±125ps (pk-pk) at 3.3V
• 3.3V or 5V operation
• Small Die
• Controlled rise and fall times and output slew rate


Pinout




Specifications

Supply Voltage..................................................0.5 to +7.0V
Input Voltage.............................................. 0.5V to V_DD+0.5
Storage Temperature (Non-Condensing)... 55°C to +150°C
Junction Temperature ............................... 55°C to +150°C
Static Discharge Voltage ........................................... >2000V


Description

The CY2037 is an EPROM programmable, high accuracy,PLL-based die designed for the crystal oscillator market. The die attaches directly to a low-cost 10-30MHz crystal and can be packaged into 4-pin through-hole or surface mount packages.
The oscillator devices can be stocked as blank parts and custom frequencies programmed in-package at the last stage before shipping. This enables fast-turn manufacture of custom and standard crystal oscillators without the need for dedicated, expensive crystals.
The CY2037 contains an on-chip oscillator and a unique oscillator tuning circuit for fine-tuning of the output frequency. The crystal Cload can be selectively adjusted by programming a set of seven EPROM bits. This feature can be used to compensate for crystal variations or to obtain a more accurate synthesized frequency.
The CY2037 uses EPROM programming with a simple 2-wire,4-pin interface that includes VSS and VDD. Clock outputs can be generated up to 200 MHz at 5V or up to 100 MHz at 3.3V.
The entire configuration can be reprogrammed one time allowing  programmed inventory to be altered or reused.
The CY2037 PLL die has been designed for very high resolution. It has a 12 bit feedback counter multiplier and a 10 bit reference counter divider. This enables the synthesis of highly accurate and stable output clock frequencies with zero or low PPM. The clock can be further modified by eight output divider options of 1, 2, 4, 8, 16, 32, 64 and 128. The divider input can be selected as either the PLL or crystal oscillator output providing a total of sixteen separate output options. For further flexibility, the ouput is selectable between TTL and CMOS duty cycle levels.
The CY2037 also contains flexible power management control.
The part includes both PWR_DWN and OE features with integrated pull-up resistors. The PWR_DWN and OE modes have an additional setting to determine timing (asynchronous or synchronous) with respect to the output signal. Controlled rise and fall times, unique output driver circuits, and innovative circuit layout techniques enable the CY2037 to have low jitter and accurate outputs making it suitable for most PC, networking and consumer applications