CY62126EV30

The CY62126EV30 is a high performance CMOS static RAM organized as 64K words by 16 bits. This device features advanced circuit design to provide ultra low active current. This is ideal for providing More Battery Life™ (MoBL^®) in portable applications such as cellular telephones. The device also has an automatic power down feature that significantlyreduces power consumption when addresses are not toggling.  Placing the device into standby mode reduces power consumption by more than 99% when deselected (CE HIGH). The input and output pins (IO₀ through IO₁₅) are placed in a high impedance state when:
• Deselected (CE HIGH)
• Outputs are disabled (OE HIGH)
• Both Byte High Enable and Byte Low Enable are disabled (BHE, BLE HIGH)
• Write operation is active (CE LOW and WE LOW)

To write to the CY62126EV30, take Chip Enable (CE) and Write Enable (WE) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from IO pins (IO₀ through IO₇) is written into the location specified on the address pins (A₀ through A₁₅). If Byte High Enable (BHE) is LOW, then data from IO pins (IO₈ through IO₁₅) is written into the location specified on the address pins (A₀ through A₁₅).

To read from the CY62126EV30, take Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins appear on IO₀ to IO₇. If Byte High Enable (BHE) is LOW, then data from memory appears on IO₈ to IO₁₅. See the "Truth Table" on page 9 for a complete description of read and write modes.