CY62126V

The CY62126V is a high-performance CMOS static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption by 99% when deselected. The device enters power-down mode when CE is HIGH.

Writing to the device is accomplished by taking chip enable (CE) and write enable (WE) inputs LOW. If byte low enable (BLE) is LOW, then data from I/O pins (I/_O1 through I/_O8), is written into the location specified on the address pins (A₀ through A15). If byte high enable (BHE) is LOW, then data from I/O pins (I/O₉ through I/O₁₆) is written into the location specified on the address pins (A₀ through A₁₅).

Reading from the device is accomplished by taking chip enable (CE) and output enable (OE) LOW while forcing the write enable (WE) HIGH. If byte low enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If byte high enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O₁₆. See the truth table at the back of this datasheet for a complete description of read and write modes.

The input/output pins (I/O₁ through I/O₁₆) are placed in a high-impedance state when the device is deselected (CEHIGH), the outputs are disabled (OE HIGH), the BHE and BLE
are disabled (BHE, BLE HIGH), or during a write operation (CE LOW, and WE LOW).

The CY62126V is available in standard 44-pin TSOP Type II (forward pinout) and mini-BGA packages.