CY62127BV

Features:

• 2.7V3.6V operation
• CMOS for optimum speed/power
• Low active power (70 ns, LL version)
-54 mW (max.) (15 mA)
• Low standby power (70 ns, LL version)
-54 µW (max.) (15 µA)
• Automatic power-down when deselected
-Power down either with CE or BHE and BLE HIGH
• Independent control of Upper and Lower Bytes
• Available in 44-pin TSOP II (forward) and fBGA


Pinout




Specifications

Storage Temperature .........................................................65°C to +150°C
Ambient Temperature with Power Applied.......................... 55°C to +125°C
Supply Voltage on VCC to Relative GND^[1] ............................... 0.5V to +4.6V
DC Voltage Applied to Outputs in High Z State^[1] .............0.5V to V_CC + 0.5V
DC Input Voltage^[1] ..........................................................0.5V to V_CC + 0.5V
Current into Outputs (LOW) .................................................................... 20 mA
Static Discharge Voltage ....................................................................... >2001V
(per MIL-STD-883, Method 3015) Latch-Up Current............................. >200 mA


Description

The CY62127BV is a high-performance CMOS Static RAM organized as 65,536 words by 16 bits. This device has an automatic power-down feature that significantly reduces power consumption by 99% when deselected. The device enters power-down mode when CE is HIGH or when CE is LOW and both BLE and BHE are HIGH.
Writing to the device is accomplished by taking Chip Enable (CE) and Write Enable (WE ) inputs LOW. If Byte Low Enable (BLE) is LOW, then data from I/O pins (I/O1 through I/O8), is written into the location specified on the address pins (A0 through A15). If Byte High Enable (BHE) is LOW, then data from I/O pins (I/O9 through I/O16) is written into the location specified on the address pins (A0 through A15).
Reading from the CY62127BV is accomplished by taking Chip Enable (CE) and Output Enable (OE) LOW while forcing the Write Enable (WE) HIGH. If Byte Low Enable (BLE) is LOW, then data from the memory location specified by the address pins will appear on I/O1 to I/O8. If Byte High Enable (BHE) is LOW, then data from memory will appear on I/O9 to I/O16. See the truth table at the back of this data sheet for a complete description of read and write modes.
The input/output pins (I/O1 through I/O16) are placed in a high-impedance state when the device is deselected (CE HIGH), the outputs are disabled (OE HIGH), the BHE and BLE are disabled (BHE , BLE HIGH), or during a write operation (CE LOW, and WE LOW).
The CY62127BV is available in standard 44-pin TSOP Type II (forward pinout) and fBGA packages.